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authorNobuhiro Iwamatsu <iwamatsu@nigauri.org>2007-09-23 01:29:43 +0900
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2007-09-23 01:29:43 +0900
commitb8685affe614ccf5f4ec66252b30e2e524d18948 (patch)
tree05bc55b8a4a0451e6500f1f52651d81c0f48f012 /board/freescale/mpc8544ds/init.S
parent69df3c4da0c93017cceb25a366e794570bd0ed98 (diff)
parent66dcad3a9a53e0766d90e0084123bd8529522fb0 (diff)
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Merge git://www.denx.de/git/u-boot
Conflicts: CREDITS
Diffstat (limited to 'board/freescale/mpc8544ds/init.S')
-rw-r--r--board/freescale/mpc8544ds/init.S19
1 files changed, 9 insertions, 10 deletions
diff --git a/board/freescale/mpc8544ds/init.S b/board/freescale/mpc8544ds/init.S
index 296fee5..68ccba7 100644
--- a/board/freescale/mpc8544ds/init.S
+++ b/board/freescale/mpc8544ds/init.S
@@ -52,8 +52,8 @@
*/
#define entry_start \
- mflr r1 ; \
- bl 0f ;
+ mflr r1 ; \
+ bl 0f ;
#define entry_end \
0: mflr r0 ; \
@@ -214,11 +214,11 @@ law_entry:
.long 0
.long (LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN
- .long (CFG_PCI1_MEM_BASE>>12) & 0xfffff
+ .long (CFG_PCI1_MEM_PHYS>>12) & 0xfffff
.long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)
.long (CFG_PCI1_IO_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)
+ .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_64K)
.long (CFG_LBC_CACHE_BASE>>12) & 0xfffff
.long LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M)
@@ -226,18 +226,17 @@ law_entry:
.long (CFG_PCIE1_MEM_PHYS>>12) & 0xfffff
.long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_256M)
- /* To keep to 10 LAWs, PCIE1_IO_PHYS must use top of mem region */
+ .long (CFG_PCIE1_IO_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_64K)
.long (CFG_PCIE2_MEM_PHYS>>12) & 0xfffff
.long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_512M)
.long (CFG_PCIE2_IO_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_16M)
+ .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_64K)
+ /* contains both PCIE3 MEM & IO space */
.long (CFG_PCIE3_MEM_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_256M)
-
- .long (CFG_PCIE3_IO_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_16M)
+ .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_4M)
4:
entry_end