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| author | Stefan Agner <stefan@agner.ch> | 2016-05-05 13:42:45 -0700 |
|---|---|---|
| committer | zhang sanshan <b51434@freescale.com> | 2016-05-30 17:29:26 +0800 |
| commit | 73fb09dfb7fa2640c51fd61ac91d31ddb50d7c73 (patch) | |
| tree | 37216fb855036170c2b720c4f132617c6fa5f5df /board/freescale/mpc8541cds | |
| parent | af811e85797b8fa27215f31df9f8fbf811b2cd36 (diff) | |
| download | u-boot-imx-73fb09dfb7fa2640c51fd61ac91d31ddb50d7c73.zip u-boot-imx-73fb09dfb7fa2640c51fd61ac91d31ddb50d7c73.tar.gz u-boot-imx-73fb09dfb7fa2640c51fd61ac91d31ddb50d7c73.tar.bz2 | |
imx: imx7d: fix ahb clock mux 1
The clock parent of the AHB root clock when using mux option 1
is the SYS PLL 270MHz clock. This is specified in Table 5-11
Clock Root Table of the i.MX 7Dual Applications Processor
Reference Manual.
While it could be a documentation error, the 270MHz parent is
also mentioned in the boot ROM configuration in Table 6-28: The
clock is by default at 135MHz due to a POST_PODF value of 1
(=> divider of 2).
Signed-off-by: Stefan Agner <stefan@agner.ch>
(cherry picked from commit 8183b60202754d9d33ac1a2a68a5cc2cc4640fc6)
Diffstat (limited to 'board/freescale/mpc8541cds')
0 files changed, 0 insertions, 0 deletions