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| author | Becky Bruce <beckyb@kernel.crashing.org> | 2010-12-17 17:17:59 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-14 01:32:19 -0600 |
| commit | 7ea3871e06c421a44e7286792610dc00992070e6 (patch) | |
| tree | 32d8dcd79877b18b43d5961da1db072eeece6aa0 /board/freescale/mpc8540ads/mpc8540ads.c | |
| parent | 810c44274980d8bb9fa0d81d091a374adbae8309 (diff) | |
| download | u-boot-imx-7ea3871e06c421a44e7286792610dc00992070e6.zip u-boot-imx-7ea3871e06c421a44e7286792610dc00992070e6.tar.gz u-boot-imx-7ea3871e06c421a44e7286792610dc00992070e6.tar.bz2 | |
MPC8xxx DDR: align informational prints
Add spaces to cause the informational prints to line up with
the ones from init_func_ram() in board.c. Output now looks like
this:
....
DRAM: Detected 4096 MB of memory
This U-Boot only supports < 4G of DDR
You could rebuild it with CONFIG_PHYS_64BIT
DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off)
....
The prints from lbc_sdram_init() have also been modified to line
line up and changed to start with "LBC SDRAM" instead of the
confusing "SDRAM".
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8540ads/mpc8540ads.c')
| -rw-r--r-- | board/freescale/mpc8540ads/mpc8540ads.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c index 9eeb134..c75585e 100644 --- a/board/freescale/mpc8540ads/mpc8540ads.c +++ b/board/freescale/mpc8540ads/mpc8540ads.c @@ -127,8 +127,9 @@ void lbc_sdram_init(void) volatile fsl_lbc_t *lbc = LBC_BASE_ADDR; uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; - puts(" SDRAM: "); - print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n"); + puts("LBC SDRAM: "); + print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, + "\n "); /* * Setup SDRAM Base and Option Registers |