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author | Wolfgang Denk <wd@denx.de> | 2008-10-27 22:31:32 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-27 22:31:32 +0100 |
commit | f8030519bbe20b836f3939742b959cbadfaad51b (patch) | |
tree | ae23fde6c7c196fca5fb62d6e30103974179d961 /board/freescale/mpc8536ds/mpc8536ds.c | |
parent | 5deb8022c3749faac30e9ad9694691e2442b5c93 (diff) | |
parent | c2083e0e11a03ef8be2e9f0ed8720fdc20832f3e (diff) | |
download | u-boot-imx-f8030519bbe20b836f3939742b959cbadfaad51b.zip u-boot-imx-f8030519bbe20b836f3939742b959cbadfaad51b.tar.gz u-boot-imx-f8030519bbe20b836f3939742b959cbadfaad51b.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'board/freescale/mpc8536ds/mpc8536ds.c')
-rw-r--r-- | board/freescale/mpc8536ds/mpc8536ds.c | 110 |
1 files changed, 37 insertions, 73 deletions
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index f357826..2978b7d 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -155,6 +155,9 @@ static struct pci_controller pcie2_hose; static struct pci_controller pcie3_hose; #endif +extern int fsl_pci_setup_inbound_windows(struct pci_region *r); +extern void fsl_pci_init(struct pci_controller *hose); + int first_free_busno=0; void @@ -181,10 +184,10 @@ pci_init_board(void) #ifdef CONFIG_PCIE3 { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; - extern void fsl_pci_init(struct pci_controller *hose); struct pci_controller *hose = &pcie3_hose; int pcie_ep = (host_agent == 1); int pcie_configured = (io_sel == 7); + struct pci_region *r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ printf ("\n PCIE3 connected to Slot3 as %s (base address %x)", @@ -197,27 +200,23 @@ pci_init_board(void) printf ("\n"); /* inbound */ - pci_set_region(hose->regions + 0, - CONFIG_SYS_PCI_MEMORY_BUS, - CONFIG_SYS_PCI_MEMORY_PHYS, - CONFIG_SYS_PCI_MEMORY_SIZE, - PCI_REGION_MEM | PCI_REGION_MEMORY); + r += fsl_pci_setup_inbound_windows(r); /* outbound memory */ - pci_set_region(hose->regions + 1, + pci_set_region(r++, CONFIG_SYS_PCIE3_MEM_BASE, CONFIG_SYS_PCIE3_MEM_PHYS, CONFIG_SYS_PCIE3_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ - pci_set_region(hose->regions + 2, + pci_set_region(r++, CONFIG_SYS_PCIE3_IO_BASE, CONFIG_SYS_PCIE3_IO_PHYS, CONFIG_SYS_PCIE3_IO_SIZE, PCI_REGION_IO); - hose->region_count = 3; + hose->region_count = r - hose->regions; hose->first_busno=first_free_busno; pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -239,11 +238,11 @@ pci_init_board(void) #ifdef CONFIG_PCIE1 { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; - extern void fsl_pci_init(struct pci_controller *hose); struct pci_controller *hose = &pcie1_hose; int pcie_ep = (host_agent == 5); int pcie_configured = (io_sel == 2 || io_sel == 3 || io_sel == 5 || io_sel == 7); + struct pci_region *r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ printf ("\n PCIE1 connected to Slot1 as %s (base address %x)", @@ -256,36 +255,31 @@ pci_init_board(void) printf ("\n"); /* inbound */ - pci_set_region(hose->regions + 0, - CONFIG_SYS_PCI_MEMORY_BUS, - CONFIG_SYS_PCI_MEMORY_PHYS, - CONFIG_SYS_PCI_MEMORY_SIZE, - PCI_REGION_MEM | PCI_REGION_MEMORY); + r += fsl_pci_setup_inbound_windows(r); /* outbound memory */ - pci_set_region(hose->regions + 1, + pci_set_region(r++, CONFIG_SYS_PCIE1_MEM_BASE, CONFIG_SYS_PCIE1_MEM_PHYS, CONFIG_SYS_PCIE1_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ - pci_set_region(hose->regions + 2, + pci_set_region(r++, CONFIG_SYS_PCIE1_IO_BASE, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_SIZE, PCI_REGION_IO); - hose->region_count = 3; #ifdef CONFIG_SYS_PCIE1_MEM_BASE2 /* outbound memory */ - pci_set_region(hose->regions + 3, + pci_set_region(r++, CONFIG_SYS_PCIE1_MEM_BASE2, CONFIG_SYS_PCIE1_MEM_PHYS2, CONFIG_SYS_PCIE1_MEM_SIZE2, PCI_REGION_MEM); - hose->region_count++; #endif + hose->region_count = r - hose->regions; hose->first_busno=first_free_busno; pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -308,10 +302,10 @@ pci_init_board(void) #ifdef CONFIG_PCIE2 { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; - extern void fsl_pci_init(struct pci_controller *hose); struct pci_controller *hose = &pcie2_hose; int pcie_ep = (host_agent == 3); int pcie_configured = (io_sel == 5 || io_sel == 7); + struct pci_region *r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ printf ("\n PCIE2 connected to Slot 2 as %s (base address %x)", @@ -324,36 +318,31 @@ pci_init_board(void) printf ("\n"); /* inbound */ - pci_set_region(hose->regions + 0, - CONFIG_SYS_PCI_MEMORY_BUS, - CONFIG_SYS_PCI_MEMORY_PHYS, - CONFIG_SYS_PCI_MEMORY_SIZE, - PCI_REGION_MEM | PCI_REGION_MEMORY); + r += fsl_pci_setup_inbound_windows(r); /* outbound memory */ - pci_set_region(hose->regions + 1, + pci_set_region(r++, CONFIG_SYS_PCIE2_MEM_BASE, CONFIG_SYS_PCIE2_MEM_PHYS, CONFIG_SYS_PCIE2_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ - pci_set_region(hose->regions + 2, + pci_set_region(r++, CONFIG_SYS_PCIE2_IO_BASE, CONFIG_SYS_PCIE2_IO_PHYS, CONFIG_SYS_PCIE2_IO_SIZE, PCI_REGION_IO); - hose->region_count = 3; #ifdef CONFIG_SYS_PCIE2_MEM_BASE2 /* outbound memory */ - pci_set_region(hose->regions + 3, + pci_set_region(r++, CONFIG_SYS_PCIE2_MEM_BASE2, CONFIG_SYS_PCIE2_MEM_PHYS2, CONFIG_SYS_PCIE2_MEM_SIZE2, PCI_REGION_MEM); - hose->region_count++; #endif + hose->region_count = r - hose->regions; hose->first_busno=first_free_busno; pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -375,8 +364,8 @@ pci_init_board(void) #ifdef CONFIG_PCI1 { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; - extern void fsl_pci_init(struct pci_controller *hose); struct pci_controller *hose = &pci1_hose; + struct pci_region *r = hose->regions; uint pci_agent = (host_agent == 6); uint pci_speed = 66666000; /*get_clock_freq (); PCI PSPEED in [4:5] */ @@ -397,35 +386,31 @@ pci_init_board(void) ); /* inbound */ - pci_set_region(hose->regions + 0, - CONFIG_SYS_PCI_MEMORY_BUS, - CONFIG_SYS_PCI_MEMORY_PHYS, - CONFIG_SYS_PCI_MEMORY_SIZE, - PCI_REGION_MEM | PCI_REGION_MEMORY); + r += fsl_pci_setup_inbound_windows(r); /* outbound memory */ - pci_set_region(hose->regions + 1, + pci_set_region(r++, CONFIG_SYS_PCI1_MEM_BASE, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ - pci_set_region(hose->regions + 2, + pci_set_region(r++, CONFIG_SYS_PCI1_IO_BASE, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_SIZE, PCI_REGION_IO); - hose->region_count = 3; + #ifdef CONFIG_SYS_PCI1_MEM_BASE2 /* outbound memory */ - pci_set_region(hose->regions + 3, + pci_set_region(r++, CONFIG_SYS_PCI1_MEM_BASE2, CONFIG_SYS_PCI1_MEM_PHYS2, CONFIG_SYS_PCI1_MEM_SIZE2, PCI_REGION_MEM); - hose->region_count++; #endif + hose->region_count = r - hose->regions; hose->first_busno=first_free_busno; pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -660,45 +645,24 @@ int board_eth_init(bd_t *bis) } #if defined(CONFIG_OF_BOARD_SETUP) -void -ft_board_setup(void *blob, bd_t *bd) -{ - int node, tmp[2]; - const char *path; +extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, + struct pci_controller *hose); +void ft_board_setup(void *blob, bd_t *bd) +{ ft_cpu_setup(blob, bd); - node = fdt_path_offset(blob, "/aliases"); - tmp[0] = 0; - if (node >= 0) { #ifdef CONFIG_PCI1 - path = fdt_getprop(blob, node, "pci0", NULL); - if (path) { - tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno; - do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); - } + ft_fsl_pci_setup(blob, "pci0", &pci1_hose); #endif #ifdef CONFIG_PCIE2 - path = fdt_getprop(blob, node, "pci1", NULL); - if (path) { - tmp[1] = pcie2_hose.last_busno - pcie2_hose.first_busno; - do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); - } + ft_fsl_pci_setup(blob, "pci1", &pcie2_hose); #endif -#ifdef CONFIG_PCIE1 - path = fdt_getprop(blob, node, "pci2", NULL); - if (path) { - tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; - do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); - } +#ifdef CONFIG_PCIE2 + ft_fsl_pci_setup(blob, "pci2", &pcie1_hose); #endif -#ifdef CONFIG_PCIE3 - path = fdt_getprop(blob, node, "pci3", NULL); - if (path) { - tmp[1] = pcie3_hose.last_busno - pcie3_hose.first_busno; - do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); - } +#ifdef CONFIG_PCIE1 + ft_fsl_pci_setup(blob, "pci3", &pcie3_hose); #endif - } } #endif |