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| author | Kim Phillips <kim.phillips@freescale.com> | 2008-01-16 00:38:05 -0600 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2008-01-16 12:32:39 -0600 |
| commit | 5e918a98c26e8ab9b5d2d48d998a2ced2b5b85b3 (patch) | |
| tree | 9f6a56dea0465f853212076306ddf354a0084296 /board/freescale/mpc837xerdb/pci.c | |
| parent | 9e89647889cd4b5ada5b5e7cad6cbe55737a08d7 (diff) | |
| download | u-boot-imx-5e918a98c26e8ab9b5d2d48d998a2ced2b5b85b3.zip u-boot-imx-5e918a98c26e8ab9b5d2d48d998a2ced2b5b85b3.tar.gz u-boot-imx-5e918a98c26e8ab9b5d2d48d998a2ced2b5b85b3.tar.bz2 | |
Add support for the MPC837xERDB
MPC837xERDB board support includes:
* DDR2 330MHz hardcoded (soldered on the board)
* Local Bus NOR Flash
* I2C, UART and RTC
* eTSEC RGMII (TSEC0 - RTL8211B with MII;
* TSEC1 - VSC7385 local bus, hardcoded, requires seperate firmware
* load)
Signed-off-by: Kevin Lam <kevin.lam@freescale.com>
Signed-off-by: Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale/mpc837xerdb/pci.c')
| -rw-r--r-- | board/freescale/mpc837xerdb/pci.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/board/freescale/mpc837xerdb/pci.c b/board/freescale/mpc837xerdb/pci.c new file mode 100644 index 0000000..26e7320 --- /dev/null +++ b/board/freescale/mpc837xerdb/pci.c @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include <common.h> +#include <mpc83xx.h> +#include <pci.h> + +#if defined(CONFIG_PCI) +static struct pci_region pci_regions[] = { + { + bus_start: CFG_PCI_MEM_BASE, + phys_start: CFG_PCI_MEM_PHYS, + size: CFG_PCI_MEM_SIZE, + flags: PCI_REGION_MEM | PCI_REGION_PREFETCH + }, + { + bus_start: CFG_PCI_MMIO_BASE, + phys_start: CFG_PCI_MMIO_PHYS, + size: CFG_PCI_MMIO_SIZE, + flags: PCI_REGION_MEM + }, + { + bus_start: CFG_PCI_IO_BASE, + phys_start: CFG_PCI_IO_PHYS, + size: CFG_PCI_IO_SIZE, + flags: PCI_REGION_IO + } +}; + +void pci_init_board(void) +{ + volatile immap_t *immr = (volatile immap_t *)CFG_IMMR; + volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; + volatile law83xx_t *pci_law = immr->sysconf.pcilaw; + struct pci_region *reg[] = { pci_regions }; + + /* Enable all 5 PCI_CLK_OUTPUTS */ + clk->occr |= 0xf8000000; + udelay(2000); + + /* Configure PCI Local Access Windows */ + pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; + + pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; + + mpc83xx_pci_init(1, reg, 0); +} +#endif /* CONFIG_PCI */ |