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authorDave Liu <r63238@freescale.com>2008-04-03 16:28:29 +0800
committerKim Phillips <kim.phillips@freescale.com>2008-04-11 17:46:17 -0500
commit2000784818f043db7ca60e2846a72d097766b894 (patch)
treeca65a08c92abda2828af834668b687c3671a322b /board/freescale/mpc837xemds/pci.c
parent1ac4f320bf0b593aa0a741f2d649a8ece8838672 (diff)
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mpc83xx: Fix the SATA clock setting of 837x targets
Currently the SATA controller clock is configured as CSB clock, usually the CSB clock is 400/333/266MHz. However, The SATA IP block is only guaranteed to operate up to 200 MHz as stated in the HW spec. The bug is reported by Joe D'Abbraccio <ljd015@freescale.com> This patch makes the SATA clock as half of CSB clock. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale/mpc837xemds/pci.c')
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