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| author | Scott Wood <scottwood@freescale.com> | 2008-06-30 14:13:28 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2008-08-12 11:31:31 -0500 |
| commit | e4c09508545d1c45617ba45391c03c03cbc360b9 (patch) | |
| tree | e852df200e5d41e954f43c1f315a5cd482173a65 /board/freescale/mpc8313erdb/sdram.c | |
| parent | acdab5c33f1ea6f5e08f06f08bc64af23ff40d71 (diff) | |
| download | u-boot-imx-e4c09508545d1c45617ba45391c03c03cbc360b9.zip u-boot-imx-e4c09508545d1c45617ba45391c03c03cbc360b9.tar.gz u-boot-imx-e4c09508545d1c45617ba45391c03c03cbc360b9.tar.bz2 | |
NAND boot: MPC8313ERDB support
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset. I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'board/freescale/mpc8313erdb/sdram.c')
| -rw-r--r-- | board/freescale/mpc8313erdb/sdram.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c index afd8b9d..3a6347f 100644 --- a/board/freescale/mpc8313erdb/sdram.c +++ b/board/freescale/mpc8313erdb/sdram.c @@ -58,8 +58,10 @@ static void resume_from_sleep(void) */ static long fixed_sdram(void) { - volatile immap_t *im = (volatile immap_t *)CFG_IMMR; u32 msize = CFG_DDR_SIZE * 1024 * 1024; + +#ifndef CFG_RAMBOOT + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; u32 msize_log2 = __ilog2(msize); im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; @@ -100,6 +102,7 @@ static long fixed_sdram(void) /* enable DDR controller */ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; +#endif return msize; } |