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authorWolfgang Denk <wd@denx.de>2009-12-15 23:38:34 +0100
committerWolfgang Denk <wd@denx.de>2009-12-15 23:38:34 +0100
commitbb3bcfa2426cc6a0aecec7270e3ee67ca843a125 (patch)
tree0314e3d8e8d9e4d568a496fca27db33d66e68bb4 /board/freescale/mpc8313erdb/sdram.c
parenta200a7c04d89853d2a1395b96d8ca5e3dd754551 (diff)
parent4b142febff71eabdb7ddbb125c7b583b24ddc434 (diff)
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Merge branch 'next' of ../next
Diffstat (limited to 'board/freescale/mpc8313erdb/sdram.c')
-rw-r--r--board/freescale/mpc8313erdb/sdram.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index cb13829..0c4fd68 100644
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -72,7 +72,7 @@ static long fixed_sdram(void)
* Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg],
* or the DDR2 controller may fail to initialize correctly.
*/
- udelay(50000);
+ __udelay(50000);
im->ddr.csbnds[0].csbnds = (msize - 1) >> 24;
im->ddr.cs_config[0] = CONFIG_SYS_DDR_CONFIG;