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| author | Mike Frysinger <vapier@gentoo.org> | 2010-12-23 15:40:12 -0500 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-01-09 18:06:50 +0100 |
| commit | 8ef583a0351590a91394499eb5ca2ab8a703d959 (patch) | |
| tree | 36dafbd4bdd7e46130aec04bbc0dbfe26e896d9f /board/freescale/mpc8260ads | |
| parent | 4ffeab2cc00b61bc4616d9e3c25d33937b0feb34 (diff) | |
| download | u-boot-imx-8ef583a0351590a91394499eb5ca2ab8a703d959.zip u-boot-imx-8ef583a0351590a91394499eb5ca2ab8a703d959.tar.gz u-boot-imx-8ef583a0351590a91394499eb5ca2ab8a703d959.tar.bz2 | |
miiphy: convert to linux/mii.h
The include/miiphy.h header duplicates a lot of things from linux/mii.h.
So punt all the things that overlap to keep the API simple and to make
merging between U-Boot and Linux simpler.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'board/freescale/mpc8260ads')
| -rw-r--r-- | board/freescale/mpc8260ads/mpc8260ads.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/freescale/mpc8260ads/mpc8260ads.c b/board/freescale/mpc8260ads/mpc8260ads.c index be55626..8f617ca 100644 --- a/board/freescale/mpc8260ads/mpc8260ads.c +++ b/board/freescale/mpc8260ads/mpc8260ads.c @@ -243,8 +243,8 @@ void reset_phy (void) * Enable autonegotiation. */ bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, 16, 0x610); - bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #else /* * Ethernet PHY is configured (by means of configuration pins) @@ -254,13 +254,13 @@ void reset_phy (void) */ /* Advertise all capabilities */ - bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, PHY_ANAR, 0x01E1); + bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, MII_ADVERTISE, 0x01E1); /* Do not bypass Rx/Tx (de)scrambler */ - bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, PHY_DCR, 0x0000); + bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, MII_FCSCOUNTER, 0x0000); - bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #endif /* CONFIG_ADSTYPE == CONFIG_SYS_PQ2FADS */ #endif /* CONFIG_MII */ } |