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| author | Anatolij Gustschin <agust@denx.de> | 2013-02-08 00:03:45 +0000 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2013-03-09 08:22:23 +0100 |
| commit | e5f538649c7d492b097fcfaf62e03b32b11e11be (patch) | |
| tree | 5483eb3db5f09bbdaf519641d983273c6579ec7c /board/freescale/mpc5121ads | |
| parent | 676c66918a41f32b768abe1cb9fcb5f475682935 (diff) | |
| download | u-boot-imx-e5f538649c7d492b097fcfaf62e03b32b11e11be.zip u-boot-imx-e5f538649c7d492b097fcfaf62e03b32b11e11be.tar.gz u-boot-imx-e5f538649c7d492b097fcfaf62e03b32b11e11be.tar.bz2 | |
mpc512x: use common code for clock setting for all mpc512x boards
Only define enabled clocks in the config file and enable
the clocks in common code.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/freescale/mpc5121ads')
| -rw-r--r-- | board/freescale/mpc5121ads/mpc5121ads.c | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index 4b58dbc..33a8aa5 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -38,25 +38,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* Clocks in use */ -#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ - CLOCK_SCCR1_DDR_EN | \ - CLOCK_SCCR1_FEC_EN | \ - CLOCK_SCCR1_LPC_EN | \ - CLOCK_SCCR1_NFC_EN | \ - CLOCK_SCCR1_PATA_EN | \ - CLOCK_SCCR1_PCI_EN | \ - CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ - CLOCK_SCCR1_PSCFIFO_EN | \ - CLOCK_SCCR1_TPR_EN) - -#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_DIU_EN | \ - CLOCK_SCCR2_I2C_EN | \ - CLOCK_SCCR2_MEM_EN | \ - CLOCK_SCCR2_SPDIF_EN | \ - CLOCK_SCCR2_USB1_EN | \ - CLOCK_SCCR2_USB2_EN) - void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip); /* Active chip number set in board_nand_select_device() (mpc5121_nfc.c) */ @@ -83,8 +64,6 @@ void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip) int board_early_init_f(void) { - volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - /* * Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control * @@ -102,16 +81,6 @@ int board_early_init_f(void) out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0x32); } #endif - - /* - * Enable clocks - */ - out_be32 (&im->clk.sccr[0], SCCR1_CLOCKS_EN); - out_be32 (&im->clk.sccr[1], SCCR2_CLOCKS_EN); -#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) - setbits_be32 (&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); -#endif - return 0; } |