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authorStefan Roese <sr@denx.de>2008-10-21 11:43:08 +0200
committerStefan Roese <sr@denx.de>2008-10-21 11:43:08 +0200
commitf61f1e150c84f5b9347fca79a4bc5f2286c545d2 (patch)
treeab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/freescale/m547xevb/m547xevb.c
parentec081c2c190148b374e86a795fb6b1c49caeb549 (diff)
parentf82642e33899766892499b163e60560fbbf87773 (diff)
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Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/freescale/m547xevb/m547xevb.c')
-rw-r--r--board/freescale/m547xevb/m547xevb.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/board/freescale/m547xevb/m547xevb.c b/board/freescale/m547xevb/m547xevb.c
index 6d7d270..9f1ec38 100644
--- a/board/freescale/m547xevb/m547xevb.c
+++ b/board/freescale/m547xevb/m547xevb.c
@@ -43,53 +43,53 @@ phys_size_t initdram(int board_type)
volatile siu_t *siu = (siu_t *) (MMAP_SIU);
volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM);
u32 dramsize, i;
-#ifdef CFG_DRAMSZ1
+#ifdef CONFIG_SYS_DRAMSZ1
u32 temp;
#endif
- siu->drv = CFG_SDRAM_DRVSTRENGTH;
+ siu->drv = CONFIG_SYS_SDRAM_DRVSTRENGTH;
- dramsize = CFG_DRAMSZ * 0x100000;
+ dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
for (i = 0x13; i < 0x20; i++) {
if (dramsize == (1 << i))
break;
}
i--;
- siu->cs0cfg = (CFG_SDRAM_BASE | i);
+ siu->cs0cfg = (CONFIG_SYS_SDRAM_BASE | i);
-#ifdef CFG_DRAMSZ1
- temp = CFG_DRAMSZ1 * 0x100000;
+#ifdef CONFIG_SYS_DRAMSZ1
+ temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
for (i = 0x13; i < 0x20; i++) {
if (temp == (1 << i))
break;
}
i--;
dramsize += temp;
- siu->cs1cfg = ((CFG_SDRAM_BASE + temp) | i);
+ siu->cs1cfg = ((CONFIG_SYS_SDRAM_BASE + temp) | i);
#endif
- sdram->cfg1 = CFG_SDRAM_CFG1;
- sdram->cfg2 = CFG_SDRAM_CFG2;
+ sdram->cfg1 = CONFIG_SYS_SDRAM_CFG1;
+ sdram->cfg2 = CONFIG_SYS_SDRAM_CFG2;
/* Issue PALL */
- sdram->ctrl = CFG_SDRAM_CTRL | 2;
+ sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 2;
/* Issue LEMR */
- sdram->mode = CFG_SDRAM_EMOD;
- sdram->mode = (CFG_SDRAM_MODE | 0x04000000);
+ sdram->mode = CONFIG_SYS_SDRAM_EMOD;
+ sdram->mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);
udelay(500);
/* Issue PALL */
- sdram->ctrl = (CFG_SDRAM_CTRL | 2);
+ sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL | 2);
/* Perform two refresh cycles */
- sdram->ctrl = CFG_SDRAM_CTRL | 4;
- sdram->ctrl = CFG_SDRAM_CTRL | 4;
+ sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4;
+ sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4;
- sdram->mode = CFG_SDRAM_MODE;
+ sdram->mode = CONFIG_SYS_SDRAM_MODE;
- sdram->ctrl = (CFG_SDRAM_CTRL & ~0x80000000) | 0x10000F00;
+ sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00;
udelay(100);