diff options
| author | Stefan Roese <sr@denx.de> | 2008-08-13 06:47:12 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-08-13 06:47:12 +0200 |
| commit | 5a7ddf4e1fb9347f783eb1473c30187d7a22bd81 (patch) | |
| tree | 5e30fc06d7bbd5b382b1a7b89f57cd81a5246f32 /board/freescale/m5329evb | |
| parent | 9939ffd5fbf1f5aff4d8172531d4fc33797c62c8 (diff) | |
| parent | 8641ff266ae6638da201747c239fd39ba34c4958 (diff) | |
| download | u-boot-imx-5a7ddf4e1fb9347f783eb1473c30187d7a22bd81.zip u-boot-imx-5a7ddf4e1fb9347f783eb1473c30187d7a22bd81.tar.gz u-boot-imx-5a7ddf4e1fb9347f783eb1473c30187d7a22bd81.tar.bz2 | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/freescale/m5329evb')
| -rw-r--r-- | board/freescale/m5329evb/nand.c | 42 |
1 files changed, 16 insertions, 26 deletions
diff --git a/board/freescale/m5329evb/nand.c b/board/freescale/m5329evb/nand.c index 344a614..f84912e 100644 --- a/board/freescale/m5329evb/nand.c +++ b/board/freescale/m5329evb/nand.c @@ -40,36 +40,26 @@ DECLARE_GLOBAL_DATA_PTR; #define SET_ALE 0x08 #define CLR_ALE ~SET_ALE -static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd) +static void nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *this = mtdinfo->priv; - volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS; +/* volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS; TODO: handle wp */ u32 nand_baseaddr = (u32) this->IO_ADDR_W; - switch (cmd) { - case NAND_CTL_SETNCE: - case NAND_CTL_CLRNCE: - break; - case NAND_CTL_SETCLE: - nand_baseaddr |= SET_CLE; - break; - case NAND_CTL_CLRCLE: - nand_baseaddr &= CLR_CLE; - break; - case NAND_CTL_SETALE: - nand_baseaddr |= SET_ALE; - break; - case NAND_CTL_CLRALE: - nand_baseaddr |= CLR_ALE; - break; - case NAND_CTL_SETWP: - fbcs->csmr2 |= FBCS_CSMR_WP; - break; - case NAND_CTL_CLRWP: - fbcs->csmr2 &= ~FBCS_CSMR_WP; - break; + if (ctrl & NAND_CTRL_CHANGE) { + if ( ctrl & NAND_CLE ) + nand_baseaddr |= SET_CLE; + else + nand_baseaddr &= CLR_CLE; + if ( ctrl & NAND_ALE ) + nand_baseaddr |= SET_ALE; + else + nand_baseaddr &= CLR_ALE; } this->IO_ADDR_W = (void __iomem *)(nand_baseaddr); + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); } static void nand_write_byte(struct mtd_info *mtdinfo, u_char byte) @@ -103,8 +93,8 @@ int board_nand_init(struct nand_chip *nand) gpio->podr_timer = 0; nand->chip_delay = 50; - nand->eccmode = NAND_ECC_SOFT; - nand->hwcontrol = nand_hwcontrol; + nand->ecc.mode = NAND_ECC_SOFT; + nand->cmd_ctrl = nand_hwcontrol; nand->read_byte = nand_read_byte; nand->write_byte = nand_write_byte; nand->dev_ready = nand_dev_ready; |