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author | Yunhui Cui <yunhui.cui@nxp.com> | 2016-06-08 10:31:42 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2016-06-10 13:43:12 -0700 |
commit | a758177f9b9a567df2e8e6e57ac905ada24d8d9c (patch) | |
tree | b618ee8928ad9a9ff004a174d120f3066e3006e7 /board/freescale/ls2080ardb/eth_ls2080rdb.c | |
parent | 6b3943f1b04be60f147ee540fbd72c4c7ea89f80 (diff) | |
download | u-boot-imx-a758177f9b9a567df2e8e6e57ac905ada24d8d9c.zip u-boot-imx-a758177f9b9a567df2e8e6e57ac905ada24d8d9c.tar.gz u-boot-imx-a758177f9b9a567df2e8e6e57ac905ada24d8d9c.tar.bz2 |
armv8/ls2080a: configure PMU's PCTBENR to enable WDT
The SP805-WDT module on LS2080A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.
Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls2080ardb/eth_ls2080rdb.c')
0 files changed, 0 insertions, 0 deletions