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| author | Shaohui Xie <Shaohui.Xie@freescale.com> | 2015-11-23 15:23:48 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-12-13 18:27:29 -0800 |
| commit | e994dddbbe031c818758b2ea91f59697b07d94b6 (patch) | |
| tree | 71243150e42d79228bd8aac4b2a4a6c3cb0a8d5e /board/freescale/ls1043ardb | |
| parent | a46b1852de967f8a7de26e0b46e864c794a18c16 (diff) | |
| download | u-boot-imx-e994dddbbe031c818758b2ea91f59697b07d94b6.zip u-boot-imx-e994dddbbe031c818758b2ea91f59697b07d94b6.tar.gz u-boot-imx-e994dddbbe031c818758b2ea91f59697b07d94b6.tar.bz2 | |
armv8/ls1043ardb: Add support for >2GB memory
This patch also expose the complete DDR region(s) to Linux.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/ls1043ardb')
| -rw-r--r-- | board/freescale/ls1043ardb/ddr.c | 9 | ||||
| -rw-r--r-- | board/freescale/ls1043ardb/ls1043ardb.c | 10 |
2 files changed, 18 insertions, 1 deletions
diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c index b181579..249d056 100644 --- a/board/freescale/ls1043ardb/ddr.c +++ b/board/freescale/ls1043ardb/ddr.c @@ -187,5 +187,12 @@ phys_size_t initdram(int board_type) void dram_init_banksize(void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = gd->ram_size; + if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) { + gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE; + gd->bd->bi_dram[1].size = gd->ram_size - + CONFIG_SYS_DDR_BLOCK1_SIZE; + } else { + gd->bd->bi_dram[0].size = gd->ram_size; + } } diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index cdd50d6..4556ea8 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -130,6 +130,16 @@ int misc_init_r(void) int ft_board_setup(void *blob, bd_t *bd) { + u64 base[CONFIG_NR_DRAM_BANKS]; + u64 size[CONFIG_NR_DRAM_BANKS]; + + /* fixup DT for the two DDR banks */ + base[0] = gd->bd->bi_dram[0].start; + size[0] = gd->bd->bi_dram[0].size; + base[1] = gd->bd->bi_dram[1].start; + size[1] = gd->bd->bi_dram[1].size; + + fdt_fixup_memory_banks(blob, base, size, 2); ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN |