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| author | Xiubo Li <Li.Xiubo@freescale.com> | 2014-11-21 17:40:59 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-12-11 09:42:22 -0800 |
| commit | 660673af4fd10c544ceeedeb524ba92c27dbc586 (patch) | |
| tree | 2979c885f915d9aa5561a7977ac2c1b3543aa0ff /board/freescale/ls1021atwr/ls1021atwr.c | |
| parent | e87f3b308c454f6e78b02da857936c7d012c385b (diff) | |
| download | u-boot-imx-660673af4fd10c544ceeedeb524ba92c27dbc586.zip u-boot-imx-660673af4fd10c544ceeedeb524ba92c27dbc586.tar.gz u-boot-imx-660673af4fd10c544ceeedeb524ba92c27dbc586.tar.bz2 | |
ARM: ls102xa: Setting device's stream id for SMMUs.
LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/ls1021atwr/ls1021atwr.c')
| -rw-r--r-- | board/freescale/ls1021atwr/ls1021atwr.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 0e61aba..8ab229d 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -11,6 +11,7 @@ #include <asm/arch/ns_access.h> #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> +#include <asm/arch/ls102xa_stream_id.h> #include <asm/pcie_layerscape.h> #include <mmc.h> #include <fsl_esdhc.h> @@ -388,6 +389,23 @@ static struct csu_ns_dev ns_dev[] = { }; #endif +struct smmu_stream_id dev_stream_id[] = { + { 0x100, 0x01, "ETSEC MAC1" }, + { 0x104, 0x02, "ETSEC MAC2" }, + { 0x108, 0x03, "ETSEC MAC3" }, + { 0x10c, 0x04, "PEX1" }, + { 0x110, 0x05, "PEX2" }, + { 0x114, 0x06, "qDMA" }, + { 0x118, 0x07, "SATA" }, + { 0x11c, 0x08, "USB3" }, + { 0x120, 0x09, "QE" }, + { 0x124, 0x0a, "eSDHC" }, + { 0x128, 0x0b, "eMA" }, + { 0x14c, 0x0c, "2D-ACE" }, + { 0x150, 0x0d, "USB2" }, + { 0x18c, 0x0e, "DEBUG" }, +}; + int board_init(void) { struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; @@ -407,6 +425,9 @@ int board_init(void) #endif #endif + ls102xa_config_smmu_stream_id(dev_stream_id, + ARRAY_SIZE(dev_stream_id)); + #ifdef CONFIG_LS102XA_NS_ACCESS enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev)); #endif |