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| author | Tom Rini <trini@ti.com> | 2014-09-26 09:57:52 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-09-26 09:57:52 -0400 |
| commit | 2c2277f15cbaa9533ef8aead7328c3f605251147 (patch) | |
| tree | 9e7ee343a1f75ecdd57a7fa8025eab2464654ecb /board/freescale/ls1021aqds | |
| parent | 2c3dc792b6df16970077c0d64085e29f1f85d4c8 (diff) | |
| parent | c7eae7fcb11bc7dab519fca8d8902f1fbc5c3c76 (diff) | |
| download | u-boot-imx-2c2277f15cbaa9533ef8aead7328c3f605251147.zip u-boot-imx-2c2277f15cbaa9533ef8aead7328c3f605251147.tar.gz u-boot-imx-2c2277f15cbaa9533ef8aead7328c3f605251147.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'board/freescale/ls1021aqds')
| -rw-r--r-- | board/freescale/ls1021aqds/MAINTAINERS | 1 | ||||
| -rw-r--r-- | board/freescale/ls1021aqds/ddr.c | 9 | ||||
| -rw-r--r-- | board/freescale/ls1021aqds/ddr.h | 10 |
3 files changed, 19 insertions, 1 deletions
diff --git a/board/freescale/ls1021aqds/MAINTAINERS b/board/freescale/ls1021aqds/MAINTAINERS index 021d82b..ccf4513 100644 --- a/board/freescale/ls1021aqds/MAINTAINERS +++ b/board/freescale/ls1021aqds/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/freescale/ls1021aqds/ F: include/configs/ls1021aqds.h F: configs/ls1021aqds_nor_defconfig +F: configs/ls1021aqds_ddr4_nor_defconfig diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c index 679c654..5898e33 100644 --- a/board/freescale/ls1021aqds/ddr.c +++ b/board/freescale/ls1021aqds/ddr.c @@ -79,7 +79,6 @@ found: */ popts->wrlvl_override = 1; popts->wrlvl_sample = 0xf; - popts->cswl_override = DDR_CSWL_CS0; /* * Rtt and Rtt_WR override @@ -89,9 +88,17 @@ found: /* Enable ZQ calibration */ popts->zq_en = 1; +#ifdef CONFIG_SYS_FSL_DDR4 + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) | + DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */ +#else + popts->cswl_override = DDR_CSWL_CS0; + /* DHC_EN =1, ODT = 75 Ohm */ popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); +#endif } #ifdef CONFIG_SYS_DDR_RAW_TIMING diff --git a/board/freescale/ls1021aqds/ddr.h b/board/freescale/ls1021aqds/ddr.h index 16d87cb..f819c99 100644 --- a/board/freescale/ls1021aqds/ddr.h +++ b/board/freescale/ls1021aqds/ddr.h @@ -30,6 +30,13 @@ static const struct board_specific_parameters udimm0[] = { * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay | */ +#ifdef CONFIG_SYS_FSL_DDR4 + {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A,}, + {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A,}, + {1, 1666, 0, 4, 8, 0x090A0B0B, 0x0C0D0E0C,}, + {1, 1900, 0, 4, 9, 0x0A0B0C0B, 0x0D0E0F0D,}, + {1, 2200, 0, 4, 10, 0x0B0C0D0C, 0x0E0F110E,}, +#elif defined(CONFIG_SYS_FSL_DDR3) {1, 833, 1, 6, 8, 0x06060607, 0x08080807, 0x1f, 2, 0}, {1, 1350, 1, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, {1, 833, 2, 6, 8, 0x06060607, 0x08080807, 0x1f, 2, 0}, @@ -39,6 +46,9 @@ static const struct board_specific_parameters udimm0[] = { {2, 1350, 0, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, {2, 1666, 4, 4, 0xa, 0x0B08090C, 0x0B0E0D0A, 0x1f, 2, 0}, {2, 1666, 0, 4, 0xa, 0x0B08090C, 0x0B0E0D0A, 0x1f, 2, 0}, +#else +#error DDR type not defined +#endif {} }; |