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author | Tom Rini <trini@konsulko.com> | 2017-02-03 20:33:42 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2017-02-03 20:33:42 -0500 |
commit | c83a824e62277162ad35f52879b2316902c0eff5 (patch) | |
tree | fa91cdcda24b8822d0f1e52786b2657e4d68be27 /board/freescale/ls1012ardb | |
parent | 0ff27d4a94637d4b1937c625d33212375bd118d9 (diff) | |
parent | add63f94a9c3bbe1af3fdf3f4c56a5185a4c0504 (diff) | |
download | u-boot-imx-c83a824e62277162ad35f52879b2316902c0eff5.zip u-boot-imx-c83a824e62277162ad35f52879b2316902c0eff5.tar.gz u-boot-imx-c83a824e62277162ad35f52879b2316902c0eff5.tar.bz2 |
Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
configs/ls1046aqds_defconfig
configs/ls1046aqds_nand_defconfig
configs/ls1046aqds_qspi_defconfig
configs/ls1046aqds_sdcard_ifc_defconfig
configs/ls1046aqds_sdcard_qspi_defconfig
configs/ls1046ardb_emmc_defconfig
configs/ls1046ardb_qspi_defconfig
configs/ls1046ardb_sdcard_defconfig
Diffstat (limited to 'board/freescale/ls1012ardb')
-rw-r--r-- | board/freescale/ls1012ardb/ls1012ardb.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index 65fa94c..e3a8a76 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -9,6 +9,9 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> +#ifdef CONFIG_FSL_LS_PPA +#include <asm/arch/ppa.h> +#endif #include <asm/arch/soc.h> #include <hwconfig.h> #include <ahci.h> @@ -110,6 +113,9 @@ int board_init(void) gd->env_addr = (ulong)&default_environment[0]; #endif +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif return 0; } @@ -159,3 +165,32 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } + +void dram_init_banksize(void) +{ + /* + * gd->secure_ram tracks the location of secure memory. + * It was set as if the memory starts from 0. + * The address needs to add the offset of its bank. + */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) { + gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE; + gd->bd->bi_dram[1].size = gd->ram_size - + CONFIG_SYS_DDR_BLOCK1_SIZE; +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + gd->arch.secure_ram = gd->bd->bi_dram[1].start + + gd->arch.secure_ram - + CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; +#endif + } else { + gd->bd->bi_dram[0].size = gd->ram_size; +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + gd->arch.secure_ram = gd->bd->bi_dram[0].start + + gd->arch.secure_ram; + gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; +#endif + } +} |