summaryrefslogtreecommitdiff
path: root/board/freescale/ls1012afrdm/ls1012afrdm.c
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2017-02-03 20:33:42 -0500
committerTom Rini <trini@konsulko.com>2017-02-03 20:33:42 -0500
commitc83a824e62277162ad35f52879b2316902c0eff5 (patch)
treefa91cdcda24b8822d0f1e52786b2657e4d68be27 /board/freescale/ls1012afrdm/ls1012afrdm.c
parent0ff27d4a94637d4b1937c625d33212375bd118d9 (diff)
parentadd63f94a9c3bbe1af3fdf3f4c56a5185a4c0504 (diff)
downloadu-boot-imx-c83a824e62277162ad35f52879b2316902c0eff5.zip
u-boot-imx-c83a824e62277162ad35f52879b2316902c0eff5.tar.gz
u-boot-imx-c83a824e62277162ad35f52879b2316902c0eff5.tar.bz2
Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/ls1046aqds_defconfig configs/ls1046aqds_nand_defconfig configs/ls1046aqds_qspi_defconfig configs/ls1046aqds_sdcard_ifc_defconfig configs/ls1046aqds_sdcard_qspi_defconfig configs/ls1046ardb_emmc_defconfig configs/ls1046ardb_qspi_defconfig configs/ls1046ardb_sdcard_defconfig
Diffstat (limited to 'board/freescale/ls1012afrdm/ls1012afrdm.c')
-rw-r--r--board/freescale/ls1012afrdm/ls1012afrdm.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
index b03bdb8..789cae2 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -9,6 +9,9 @@
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/arch/ppa.h>
+#endif
#include <asm/arch/soc.h>
#include <hwconfig.h>
#include <environment.h>
@@ -74,6 +77,9 @@ int board_init(void)
gd->env_addr = (ulong)&default_environment[0];
#endif
+#ifdef CONFIG_FSL_LS_PPA
+ ppa_init();
+#endif
return 0;
}
@@ -85,3 +91,32 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0;
}
+
+void dram_init_banksize(void)
+{
+ /*
+ * gd->arch.secure_ram tracks the location of secure memory.
+ * It was set as if the memory starts from 0.
+ * The address needs to add the offset of its bank.
+ */
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) {
+ gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE;
+ gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE;
+ gd->bd->bi_dram[1].size = gd->ram_size -
+ CONFIG_SYS_DDR_BLOCK1_SIZE;
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+ gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+ gd->arch.secure_ram -
+ CONFIG_SYS_DDR_BLOCK1_SIZE;
+ gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+#endif
+ } else {
+ gd->bd->bi_dram[0].size = gd->ram_size;
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+ gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+ gd->arch.secure_ram;
+ gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+#endif
+ }
+}