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author | Minkyu Kang <mk7.kang@samsung.com> | 2010-05-31 09:13:11 +0900 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-05-31 09:13:11 +0900 |
commit | 922d27b596c179c5a7d68abe45ede5adb1b6589c (patch) | |
tree | c5ef3d5dc70bf51646a7fd7a379f6c2b2588cc2e /board/freescale/common | |
parent | de200874fb9ecac51d74b4e9783ebb5d2e94c449 (diff) | |
parent | 39c209546ab5b11ca6410c5cc57dcbf457e50800 (diff) | |
download | u-boot-imx-922d27b596c179c5a7d68abe45ede5adb1b6589c.zip u-boot-imx-922d27b596c179c5a7d68abe45ede5adb1b6589c.tar.gz u-boot-imx-922d27b596c179c5a7d68abe45ede5adb1b6589c.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
arch/arm/include/asm/mach-types.h
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/freescale/common')
-rw-r--r-- | board/freescale/common/Makefile | 22 | ||||
-rw-r--r-- | board/freescale/common/fsl_diu_fb.c | 55 |
2 files changed, 39 insertions, 38 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 620eb16..df289aa 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -29,18 +29,18 @@ endif LIB = $(obj)lib$(VENDOR).a -COBJS-${CONFIG_FSL_CADMUS} += cadmus.o -COBJS-${CONFIG_FSL_VIA} += cds_via.o -COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o -COBJS-${CONFIG_FSL_PIXIS} += pixis.o -COBJS-${CONFIG_FSL_NGPIXIS} += ngpixis.o -COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o -COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o -COBJS-${CONFIG_FSL_SGMII_RISER} += sgmii_riser.o +COBJS-$(CONFIG_FSL_CADMUS) += cadmus.o +COBJS-$(CONFIG_FSL_VIA) += cds_via.o +COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o fsl_logo_bmp.o +COBJS-$(CONFIG_FSL_PIXIS) += pixis.o +COBJS-$(CONFIG_FSL_NGPIXIS) += ngpixis.o +COBJS-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o +COBJS-$(CONFIG_ID_EEPROM) += sys_eeprom.o +COBJS-$(CONFIG_FSL_SGMII_RISER) += sgmii_riser.o -COBJS-${CONFIG_MPC8541CDS} += cds_pci_ft.o -COBJS-${CONFIG_MPC8548CDS} += cds_pci_ft.o -COBJS-${CONFIG_MPC8555CDS} += cds_pci_ft.o +COBJS-$(CONFIG_MPC8541CDS) += cds_pci_ft.o +COBJS-$(CONFIG_MPC8548CDS) += cds_pci_ft.o +COBJS-$(CONFIG_MPC8555CDS) += cds_pci_ft.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c index cbee8fe..e740ad8 100644 --- a/board/freescale/common/fsl_diu_fb.c +++ b/board/freescale/common/fsl_diu_fb.c @@ -1,5 +1,5 @@ /* - * Copyright 2007 Freescale Semiconductor, Inc. + * Copyright 2007, 2010 Freescale Semiconductor, Inc. * York Sun <yorksun@freescale.com> * * FSL DIU Framebuffer driver @@ -26,6 +26,7 @@ #include <common.h> #include <i2c.h> #include <malloc.h> +#include <asm/io.h> #include "fsl_diu_fb.h" @@ -267,9 +268,9 @@ int fsl_diu_init(int xres, memset(info->screen_base, 0, info->smem_len); - dr.diu_reg->desc[0] = (unsigned int) &dummy_ad; - dr.diu_reg->desc[1] = (unsigned int) &dummy_ad; - dr.diu_reg->desc[2] = (unsigned int) &dummy_ad; + out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad); + out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad); + out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad); debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]); debug("dummy desc[0] = 0x%x\n", hw->desc[0]); @@ -331,26 +332,26 @@ int fsl_diu_init(int xres, /* Program DIU registers */ - hw->gamma = (unsigned int) gamma.paddr; - hw->cursor= (unsigned int) cursor.paddr; - hw->bgnd = 0x007F7F7F; /* BGND */ - hw->bgnd_wb = 0; /* BGND_WB */ - hw->disp_size = var->yres << 16 | var->xres; /* DISP SIZE */ - hw->wb_size = 0; /* WB SIZE */ - hw->wb_mem_addr = 0; /* WB MEM ADDR */ - hw->hsyn_para = var->left_margin << 22 | /* BP_H */ + out_be32(&hw->gamma, (int)gamma.paddr); + out_be32(&hw->cursor, (int)cursor.paddr); + out_be32(&hw->bgnd, 0x007F7F7F); + out_be32(&hw->bgnd_wb, 0); /* BGND_WB */ + out_be32(&hw->disp_size, var->yres << 16 | var->xres); /* DISP SIZE */ + out_be32(&hw->wb_size, 0); /* WB SIZE */ + out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */ + out_be32(&hw->hsyn_para, var->left_margin << 22 | /* BP_H */ var->hsync_len << 11 | /* PW_H */ - var->right_margin; /* FP_H */ - hw->vsyn_para = var->upper_margin << 22 | /* BP_V */ - var->vsync_len << 11 | /* PW_V */ - var->lower_margin; /* FP_V */ + var->right_margin); /* FP_H */ - hw->syn_pol = 0; /* SYNC SIGNALS POLARITY */ - hw->thresholds = 0x00037800; /* The Thresholds */ - hw->int_status = 0; /* INTERRUPT STATUS */ - hw->int_mask = 0; /* INT MASK */ - hw->plut = 0x01F5F666; + out_be32(&hw->vsyn_para, var->upper_margin << 22 | /* BP_V */ + var->vsync_len << 11 | /* PW_V */ + var->lower_margin); /* FP_V */ + out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */ + out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */ + out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */ + out_be32(&hw->int_mask, 0); /* INT MASK */ + out_be32(&hw->plut, 0x01F5F666); /* Pixel Clock configuration */ debug("DIU pixclock in ps - %d\n", var->pixclock); diu_set_pixel_clock(var->pixclock); @@ -390,8 +391,8 @@ static int fsl_diu_enable_panel(struct fb_info *info) struct diu_ad *ad = &fsl_diu_fb_ad; debug("Entered: enable_panel\n"); - if (hw->desc[0] != (unsigned int)ad) - hw->desc[0] = (unsigned int)ad; + if (in_be32(&hw->desc[0]) != (unsigned)ad) + out_be32(&hw->desc[0], (unsigned)ad); debug("desc[0] = 0x%x\n", hw->desc[0]); return 0; } @@ -401,8 +402,8 @@ static int fsl_diu_disable_panel(struct fb_info *info) struct diu *hw = dr.diu_reg; debug("Entered: disable_panel\n"); - if (hw->desc[0] != (unsigned int)&dummy_ad) - hw->desc[0] = (unsigned int)&dummy_ad; + if (in_be32(&hw->desc[0]) != (unsigned)&dummy_ad) + out_be32(&hw->desc[0], (unsigned)&dummy_ad); return 0; } @@ -443,7 +444,7 @@ static void enable_lcdc(void) debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled); if (!fb_enabled) { - hw->diu_mode = dr.mode; + out_be32(&hw->diu_mode, dr.mode); fb_enabled++; } debug("diu_mode = %d\n", hw->diu_mode); @@ -455,7 +456,7 @@ static void disable_lcdc(void) debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled); if (fb_enabled) { - hw->diu_mode = 0; + out_be32(&hw->diu_mode, 0); fb_enabled = 0; } } |