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author | Kim Phillips <kim.phillips@freescale.com> | 2012-10-29 13:34:38 +0000 |
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committer | Tom Rini <trini@ti.com> | 2012-11-04 11:00:36 -0700 |
commit | e56143e54f64c849340d448adb0ca5e69a08421b (patch) | |
tree | 33367d547ef8fa69bc7aa968801a6b326a81b8f6 /board/freescale/common | |
parent | 2ed2e9121f220673389e2459870a396085287325 (diff) | |
download | u-boot-imx-e56143e54f64c849340d448adb0ca5e69a08421b.zip u-boot-imx-e56143e54f64c849340d448adb0ca5e69a08421b.tar.gz u-boot-imx-e56143e54f64c849340d448adb0ca5e69a08421b.tar.bz2 |
powerpc/mpc85xx: sparse fixes
fsl_corenet_serdes.c:485:6: warning: symbol '__soc_serdes_init' was not declared. Should it be static?
cpu_init.c:185:6: warning: symbol 'invalidate_cpc' was not declared. Should it be static?
bcsr.c:28:27: warning: non-ANSI function declaration of function 'enable_8568mds_duart'
bcsr.c:39:33: warning: non-ANSI function declaration of function 'enable_8568mds_flash_write'
bcsr.c:46:34: warning: non-ANSI function declaration of function 'disable_8568mds_flash_write'
bcsr.c:53:29: warning: non-ANSI function declaration of function 'enable_8568mds_qe_mdio'
bcsr.c:28:33: warning: non-ANSI function declaration of function 'enable_8569mds_flash_write'
bcsr.c:33:34: warning: non-ANSI function declaration of function 'disable_8569mds_flash_write'
bcsr.c:38:28: warning: non-ANSI function declaration of function 'enable_8569mds_qe_uec'
bcsr.c:63:47: warning: non-ANSI function declaration of function 'disable_8569mds_brd_eeprom_write_protect'
ngpixis.c:245:1: error: directive in argument list
ngpixis.c:247:1: error: directive in argument list
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale/common')
-rw-r--r-- | board/freescale/common/ngpixis.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c index 276ae3c..3c75028 100644 --- a/board/freescale/common/ngpixis.c +++ b/board/freescale/common/ngpixis.c @@ -237,13 +237,17 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } -U_BOOT_CMD( - pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd, - "Reset the board using the FPGA sequencer", +#ifdef CONFIG_SYS_LONGHELP +static char pixis_help_text[] = "- hard reset to default bank\n" "pixis_reset altbank - reset to alternate bank\n" #ifdef DEBUG "pixis_reset dump - display the PIXIS registers\n" #endif - "pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n" + "pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n"; +#endif + +U_BOOT_CMD( + pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd, + "Reset the board using the FPGA sequencer", pixis_help_text ); |