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authorKumar Gala <galak@kernel.crashing.org>2011-08-30 17:40:11 -0500
committerKumar Gala <galak@kernel.crashing.org>2011-09-29 19:01:06 -0500
commitf8bc7bb5a79b392db3af9f62b63caefab8afbc31 (patch)
tree9ee756eebfdcab351f4a00a52fa4505b5e2f0feb /board/freescale/common/Makefile
parent360275b362e50f480b09c7c8770019ea4287afad (diff)
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powerpc/85xx: Refactor P2041RDB to use common p_corenet files
The P2041RDB has almost identical setup for TLB, LAWS, and PCI with other P-Series CoreNet platforms. The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the TLB and LAW setup tables. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/common/Makefile')
-rw-r--r--board/freescale/common/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 79f9de2..b27f054 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -54,6 +54,7 @@ COBJS-$(CONFIG_P4080DS) += ics307_clk.o
COBJS-$(CONFIG_P5020DS) += ics307_clk.o
# deal with common files for P-series corenet based devices
+SUBLIB-$(CONFIG_P2041RDB) += p_corenet/libp_corenet.o
SUBLIB-$(CONFIG_P3041DS) += p_corenet/libp_corenet.o
SUBLIB-$(CONFIG_P4080DS) += p_corenet/libp_corenet.o
SUBLIB-$(CONFIG_P5020DS) += p_corenet/libp_corenet.o