diff options
author | Stefano Babic <sbabic@denx.de> | 2014-02-11 12:55:32 +0100 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2014-02-11 12:55:32 +0100 |
commit | 17998eff9021b7b579c0387e934d8c52603fe247 (patch) | |
tree | edc3ef069db4cdaf9c718ae60e095caf42cd1d0d /board/freescale/c29xpcie/spl.c | |
parent | 6ba45cc0f8b46533965219cfd90864a60ec1009b (diff) | |
parent | e97f9d817e600cd6f43d1d0da76f5787e33a5c56 (diff) | |
download | u-boot-imx-17998eff9021b7b579c0387e934d8c52603fe247.zip u-boot-imx-17998eff9021b7b579c0387e934d8c52603fe247.tar.gz u-boot-imx-17998eff9021b7b579c0387e934d8c52603fe247.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'board/freescale/c29xpcie/spl.c')
-rw-r--r-- | board/freescale/c29xpcie/spl.c | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/board/freescale/c29xpcie/spl.c b/board/freescale/c29xpcie/spl.c new file mode 100644 index 0000000..3cfdb72 --- /dev/null +++ b/board/freescale/c29xpcie/spl.c @@ -0,0 +1,77 @@ +/* Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <ns16550.h> +#include <malloc.h> +#include <mmc.h> +#include <nand.h> +#include <i2c.h> + +DECLARE_GLOBAL_DATA_PTR; + +ulong get_effective_memsize(void) +{ + return CONFIG_SYS_L2_SIZE; +} + +void board_init_f(ulong bootflag) +{ + u32 plat_ratio; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + console_init_f(); + + /* initialize selected port with appropriate baud rate */ + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + plat_ratio >>= 1; + gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + gd->bus_clk / 16 / CONFIG_BAUDRATE); + + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + /* Pointer is writable since we allocated a register for it */ + gd = (gd_t *)CONFIG_SPL_GD_ADDR; + bd_t *bd; + + memset(gd, 0, sizeof(gd_t)); + bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); + memset(bd, 0, sizeof(bd_t)); + gd->bd = bd; + bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; + bd->bi_memsize = CONFIG_SYS_L2_SIZE; + + probecpu(); + get_clocks(); + mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, + CONFIG_SPL_RELOC_MALLOC_SIZE); + + /* relocate environment function pointers etc. */ + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_ENV_ADDR); + gd->env_addr = (ulong)(CONFIG_ENV_ADDR); + gd->env_valid = 1; + + i2c_init_all(); + + gd->ram_size = initdram(0); + +#ifdef CONFIG_SPL_NAND_BOOT + puts("TPL\n"); +#else + puts("SPL\n"); +#endif + + nand_boot(); +} |