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| author | York Sun <yorksun@freescale.com> | 2013-10-28 16:36:02 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-11-25 11:43:47 -0800 |
| commit | 00ec3fd21170e463e29723976d37f8ea2316f168 (patch) | |
| tree | 6ff134a140dd253ec4bc925fad27200bece2fdca /board/freescale/c29xpcie/c29xpcie.c | |
| parent | d4263b8adb5bd940c95cbaebaa0da9eaf759bfed (diff) | |
| download | u-boot-imx-00ec3fd21170e463e29723976d37f8ea2316f168.zip u-boot-imx-00ec3fd21170e463e29723976d37f8ea2316f168.tar.gz u-boot-imx-00ec3fd21170e463e29723976d37f8ea2316f168.tar.bz2 | |
Driver/DDR: Update DDR driver to allow non-zero base address
The DRAM base has been zero for Power SoCs. It could be non-zero
for ARM SoCs. Use a macro instead of hard-coding to zero.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/c29xpcie/c29xpcie.c')
0 files changed, 0 insertions, 0 deletions