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author | York Sun <yorksun@freescale.com> | 2013-11-18 10:29:32 -0800 |
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committer | York Sun <yorksun@freescale.com> | 2013-11-25 11:43:46 -0800 |
commit | 9a17eb5b7e7ba528c278a9677c38d7ae722d93ec (patch) | |
tree | 5df092304229af616adb25b47d31a01ca0cf7d90 /board/freescale/bsc9132qds | |
parent | 5614e71b4956c579cd4419b958b33fa6316eaa92 (diff) | |
download | u-boot-imx-9a17eb5b7e7ba528c278a9677c38d7ae722d93ec.zip u-boot-imx-9a17eb5b7e7ba528c278a9677c38d7ae722d93ec.tar.gz u-boot-imx-9a17eb5b7e7ba528c278a9677c38d7ae722d93ec.tar.bz2 |
Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3
structure for 83xx, 85xx and 86xx.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/bsc9132qds')
-rw-r--r-- | board/freescale/bsc9132qds/bsc9132qds.c | 14 | ||||
-rw-r--r-- | board/freescale/bsc9132qds/spl_minimal.c | 3 |
2 files changed, 9 insertions, 8 deletions
diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c index 31bbf62..c1ebcf8 100644 --- a/board/freescale/bsc9132qds/bsc9132qds.c +++ b/board/freescale/bsc9132qds/bsc9132qds.c @@ -133,16 +133,16 @@ void dsp_ddr_configure(void) *copy the ddr controller settings from PowerPC side DDR controller *to the DSP DDR controller as connected DDR memories are similar. */ - ccsr_ddr_t __iomem *pa_ddr = - (ccsr_ddr_t __iomem *)CONFIG_SYS_FSL_DDR_ADDR; - ccsr_ddr_t temp_ddr; - ccsr_ddr_t __iomem *dsp_ddr = - (ccsr_ddr_t __iomem *)CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR; + struct ccsr_ddr __iomem *pa_ddr = + (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR; + struct ccsr_ddr temp_ddr; + struct ccsr_ddr __iomem *dsp_ddr = + (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR; - memcpy(&temp_ddr, pa_ddr, sizeof(ccsr_ddr_t)); + memcpy(&temp_ddr, pa_ddr, sizeof(struct ccsr_ddr)); temp_ddr.cs0_bnds = CONFIG_SYS_DDR1_CS0_BNDS; temp_ddr.sdram_cfg &= ~SDRAM_CFG_MEM_EN; - memcpy(dsp_ddr, &temp_ddr, sizeof(ccsr_ddr_t)); + memcpy(dsp_ddr, &temp_ddr, sizeof(struct ccsr_ddr)); dsp_ddr->sdram_cfg |= SDRAM_CFG_MEM_EN; } diff --git a/board/freescale/bsc9132qds/spl_minimal.c b/board/freescale/bsc9132qds/spl_minimal.c index 0249dc5..8f71431 100644 --- a/board/freescale/bsc9132qds/spl_minimal.c +++ b/board/freescale/bsc9132qds/spl_minimal.c @@ -17,7 +17,8 @@ DECLARE_GLOBAL_DATA_PTR; static void sdram_init(void) { - ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR; + struct ccsr_ddr __iomem *ddr = + (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR; #if CONFIG_DDR_CLK_FREQ == 100000000 __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds); __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config); |