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authorPrabhakar Kushwaha <prabhakar@freescale.com>2012-04-24 20:17:15 +0000
committerAndy Fleming <afleming@freescale.com>2012-07-06 17:30:29 -0500
commit7530d341c70511902fdb4b97f596ef3b9a9c52be (patch)
tree14f1cbeb3a7e323d81b81a637f9387238860ea29 /board/freescale/bsc9131rdb/bsc9131rdb.c
parent19a8dbdc4583d8330ea44b40a102f7a57e3be936 (diff)
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powerpc/mpc85xx:Add BSC9131 RDB Support
BSC9131RDB is a Freescale reference design board for BSC9131 SoC. BSC9131 SOC is an integrated device that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F baseband acceleration processing elements BSC9131RDB Overview ----------------- -1Gbyte DDR3 (on board DDR) -128Mbyte 2K page size NAND Flash -256 Kbit M24256 I2C EEPROM -128 Mbit SPI Flash memory -USB-ULPI -eTSEC1: Connected to RGMII PHY -eTSEC2: Connected to RGMII PHY -DUART interface: supports one UARTs up to 115200 bps for console display Apart from the above it also consists various peripherals to support DSP functionalities. This patch adds support for mainly Power side functionalities and peripherals Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com> Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Diffstat (limited to 'board/freescale/bsc9131rdb/bsc9131rdb.c')
-rw-r--r--board/freescale/bsc9131rdb/bsc9131rdb.c83
1 files changed, 83 insertions, 0 deletions
diff --git a/board/freescale/bsc9131rdb/bsc9131rdb.c b/board/freescale/bsc9131rdb/bsc9131rdb.c
new file mode 100644
index 0000000..2e0e55f
--- /dev/null
+++ b/board/freescale/bsc9131rdb/bsc9131rdb.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/mmu.h>
+#include <asm/cache.h>
+#include <asm/immap_85xx.h>
+#include <asm/io.h>
+#include <miiphy.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+#include <fsl_mdio.h>
+#include <tsec.h>
+#include <netdev.h>
+
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42);
+ setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS);
+
+ clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43);
+ setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK |
+ MPC85xx_PMUXCR2_UART_CTS_B1_SIM_PD);
+ setbits_be32(&gur->halt_req_mask, HALTED_TO_HALT_REQ_MASK_0);
+ clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_IFC_AD_GPIO_MASK |
+ MPC85xx_PMUXCR_IFC_AD17_GPO_MASK,
+ MPC85xx_PMUXCR_IFC_AD_GPIO |
+ MPC85xx_PMUXCR_IFC_AD17_GPO | MPC85xx_PMUXCR_SDHC_USIM);
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ struct cpu_type *cpu;
+
+ cpu = gd->cpu;
+ printf("Board: %sRDB\n", cpu->name);
+
+ return 0;
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ phys_addr_t base;
+ phys_size_t size;
+
+ ft_cpu_setup(blob, bd);
+
+ base = getenv_bootm_low();
+ size = getenv_bootm_size();
+
+ fdt_fixup_memory(blob, (u64)base, (u64)size);
+
+ fdt_fixup_dr_usb(blob, bd);
+}
+#endif