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| author | Zhao Qiang <B45475@freescale.com> | 2013-09-04 10:11:27 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-10-16 16:13:11 -0700 |
| commit | ffee1dde3c4cb2721c56c78e0360affec1c23d3f (patch) | |
| tree | fc87c859def7c217c5caca59a4a9ac3f0eae69bc /board/freescale/b4860qds/b4860qds_qixis.h | |
| parent | d56898249c09f8264fc398dd209c293116a293c9 (diff) | |
| download | u-boot-imx-ffee1dde3c4cb2721c56c78e0360affec1c23d3f.zip u-boot-imx-ffee1dde3c4cb2721c56c78e0360affec1c23d3f.tar.gz u-boot-imx-ffee1dde3c4cb2721c56c78e0360affec1c23d3f.tar.bz2 | |
SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII mode
Fix PHY addresses for QSGMII Riser Card working in
SGMII mode on board P3041/P5020/P4080/P5040/B4860.
QSGMII Riser Card can work in SGMII mode, but
having the different PHY addresses.
So the following steps should be done:
1. Confirm whether QSGMII Riser Card is used.
2. If yes, set the proper PHY address.
Generally, the function is_qsgmii_riser_card() is
for step 1, and set_sgmii_phy() for step 2.
However, there are still some special situations,
take P5040 and B4860 as examples, the PHY addresses
need to be changed when serdes protocol is changed,
so it is necessary to confirm the protocol before
setting PHY addresses.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Diffstat (limited to 'board/freescale/b4860qds/b4860qds_qixis.h')
| -rw-r--r-- | board/freescale/b4860qds/b4860qds_qixis.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/board/freescale/b4860qds/b4860qds_qixis.h b/board/freescale/b4860qds/b4860qds_qixis.h index 2fabbc7..272afc1 100644 --- a/board/freescale/b4860qds/b4860qds_qixis.h +++ b/board/freescale/b4860qds/b4860qds_qixis.h @@ -21,4 +21,9 @@ #define QIXIS_SRDS1CLK_122 0x5a #define QIXIS_SRDS1CLK_125 0x5e + +/* SGMII */ +#define PHY_BASE_ADDR 0x18 +#define PORT_NUM 0x04 +#define REGNUM 0x00 #endif |