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authorPrabhakar Kushwaha <prabhakar@freescale.com>2014-04-08 19:13:44 +0530
committerYork Sun <yorksun@freescale.com>2014-04-22 17:58:51 -0700
commitc5dfe6ec58e0b504cba5b429200f6a5d217d5bd9 (patch)
treeb769cf573080fcd60892b9bb49e3abaab76bc436 /board/freescale/b4860qds/Makefile
parent89ad7be8e713f33ec677cf4576e0c9b0ed83f7c6 (diff)
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board/b4qds:Add support of 2 stage NAND boot-loader
Add support of 2 stage NAND boot loader using SPL framework. here, PBL initialise the internal SRAM and copy SPL(160KB). This further initialise DDR using SPD and environment and copy u-boot(768 KB) from NAND to DDR. Finally SPL transer control to u-boot. Initialise/create followings required for SPL framework - Add spl.c which defines board_init_f, board_init_r - update tlb and ddr accordingly Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/b4860qds/Makefile')
-rw-r--r--board/freescale/b4860qds/Makefile9
1 files changed, 7 insertions, 2 deletions
diff --git a/board/freescale/b4860qds/Makefile b/board/freescale/b4860qds/Makefile
index e5cc054..0acd2a9 100644
--- a/board/freescale/b4860qds/Makefile
+++ b/board/freescale/b4860qds/Makefile
@@ -4,9 +4,14 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+else
obj-y += b4860qds.o
-obj-y += ddr.o
obj-$(CONFIG_B4860QDS)+= eth_b4860qds.o
-obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_PCI) += pci.o
+endif
+
+obj-y += ddr.o
obj-y += law.o
obj-y += tlb.o