diff options
author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
---|---|---|
committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /board/evb64260 | |
parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
download | u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.gz u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.bz2 |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'board/evb64260')
-rw-r--r-- | board/evb64260/bootseq.txt | 2 | ||||
-rw-r--r-- | board/evb64260/eth.c | 1 | ||||
-rw-r--r-- | board/evb64260/evb64260.c | 102 | ||||
-rw-r--r-- | board/evb64260/flash.c | 42 | ||||
-rw-r--r-- | board/evb64260/intel_flash.c | 4 | ||||
-rw-r--r-- | board/evb64260/intel_flash.h | 2 | ||||
-rw-r--r-- | board/evb64260/local.h | 2 | ||||
-rw-r--r-- | board/evb64260/misc.S | 18 | ||||
-rw-r--r-- | board/evb64260/mpsc.c | 2 | ||||
-rw-r--r-- | board/evb64260/pci.c | 20 | ||||
-rw-r--r-- | board/evb64260/sdram_init.c | 6 | ||||
-rw-r--r-- | board/evb64260/serial.c | 36 | ||||
-rw-r--r-- | board/evb64260/u-boot.lds | 3 | ||||
-rw-r--r-- | board/evb64260/zuma_pbb.c | 6 | ||||
-rw-r--r-- | board/evb64260/zuma_pbb_mbox.c | 4 |
15 files changed, 131 insertions, 119 deletions
diff --git a/board/evb64260/bootseq.txt b/board/evb64260/bootseq.txt index 290aed9..e4fefb3 100644 --- a/board/evb64260/bootseq.txt +++ b/board/evb64260/bootseq.txt @@ -88,7 +88,7 @@ in_flash: nothing mem_malloc_init malloc_bin_reloc - spi_init (r or f)??? (CFG_ENV_IS_IN_EEPROM) + spi_init (r or f)??? (CONFIG_ENV_IS_IN_EEPROM) env_relocated misc_init_r(bd): (board/evb64260/evb64260.c) mpsc_init2 diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c index fa5b6d4..ca8bab5 100644 --- a/board/evb64260/eth.c +++ b/board/evb64260/eth.c @@ -27,6 +27,7 @@ Skeleton NIC driver for Etherboot #include <asm/cache.h> #include <miiphy.h> #include <net.h> +#include <netdev.h> #include "eth.h" #include "eth_addrtbl.h" diff --git a/board/evb64260/evb64260.c b/board/evb64260/evb64260.c index ab59941..80756a5 100644 --- a/board/evb64260/evb64260.c +++ b/board/evb64260/evb64260.c @@ -31,6 +31,7 @@ #include <galileo/pci.h> #include <galileo/gt64260R.h> #include <net.h> +#include <netdev.h> #include <asm/io.h> #include "eth.h" @@ -56,7 +57,7 @@ extern void zuma_mbox_init(void); /* ------------------------------------------------------------------------- */ /* this is the current GT register space location */ -/* it starts at CFG_DFL_GT_REGS but moves later to CFG_GT_REGS */ +/* it starts at CONFIG_SYS_DFL_GT_REGS but moves later to CONFIG_SYS_GT_REGS */ /* Unfortunately, we cant change it while we are in flash, so we initialize it * to the "final" value. This means that any debug_led calls before @@ -64,7 +65,7 @@ extern void zuma_mbox_init(void); * See also my_remap_gt_regs below. (NTL) */ -unsigned int INTERNAL_REG_BASE_ADDR = CFG_GT_REGS; +unsigned int INTERNAL_REG_BASE_ADDR = CONFIG_SYS_GT_REGS; /* ------------------------------------------------------------------------- */ @@ -99,26 +100,26 @@ gt_pci_config(void) { /* move PCI stuff out of the way - NTL */ /* map PCI Host 0 */ - pciMapSpace(PCI_HOST0, PCI_REGION0, CFG_PCI0_0_MEM_SPACE, - CFG_PCI0_0_MEM_SPACE, CFG_PCI0_MEM_SIZE); + pciMapSpace(PCI_HOST0, PCI_REGION0, CONFIG_SYS_PCI0_0_MEM_SPACE, + CONFIG_SYS_PCI0_0_MEM_SPACE, CONFIG_SYS_PCI0_MEM_SIZE); pciMapSpace(PCI_HOST0, PCI_REGION1, 0, 0, 0); pciMapSpace(PCI_HOST0, PCI_REGION2, 0, 0, 0); pciMapSpace(PCI_HOST0, PCI_REGION3, 0, 0, 0); - pciMapSpace(PCI_HOST0, PCI_IO, CFG_PCI0_IO_SPACE_PCI, - CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE); + pciMapSpace(PCI_HOST0, PCI_IO, CONFIG_SYS_PCI0_IO_SPACE_PCI, + CONFIG_SYS_PCI0_IO_SPACE, CONFIG_SYS_PCI0_IO_SIZE); /* map PCI Host 1 */ - pciMapSpace(PCI_HOST1, PCI_REGION0, CFG_PCI1_0_MEM_SPACE, - CFG_PCI1_0_MEM_SPACE, CFG_PCI1_MEM_SIZE); + pciMapSpace(PCI_HOST1, PCI_REGION0, CONFIG_SYS_PCI1_0_MEM_SPACE, + CONFIG_SYS_PCI1_0_MEM_SPACE, CONFIG_SYS_PCI1_MEM_SIZE); pciMapSpace(PCI_HOST1, PCI_REGION1, 0, 0, 0); pciMapSpace(PCI_HOST1, PCI_REGION2, 0, 0, 0); pciMapSpace(PCI_HOST1, PCI_REGION3, 0, 0, 0); - pciMapSpace(PCI_HOST1, PCI_IO, CFG_PCI1_IO_SPACE_PCI, - CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE); + pciMapSpace(PCI_HOST1, PCI_IO, CONFIG_SYS_PCI1_IO_SPACE_PCI, + CONFIG_SYS_PCI1_IO_SPACE, CONFIG_SYS_PCI1_IO_SIZE); /* PCI interface settings */ GT_REG_WRITE(PCI_0TIMEOUT_RETRY, 0xffff); @@ -200,7 +201,7 @@ int board_early_init_f (void) * that if it's not at the power-on location, it's where we put * it last time. (huber) */ - my_remap_gt_regs(CFG_DFL_GT_REGS, CFG_GT_REGS); + my_remap_gt_regs(CONFIG_SYS_DFL_GT_REGS, CONFIG_SYS_GT_REGS); gt_pci_config(); @@ -217,7 +218,7 @@ int board_early_init_f (void) GT_REG_WRITE(CPU_INT_3_MASK, 0); /* now, onto the configuration */ - GT_REG_WRITE(SDRAM_CONFIGURATION, CFG_SDRAM_CONFIG); + GT_REG_WRITE(SDRAM_CONFIGURATION, CONFIG_SYS_SDRAM_CONFIG); /* ----- DEVICE BUS SETTINGS ------ */ @@ -244,62 +245,61 @@ int board_early_init_f (void) /* Zuma has no SRAM */ sram_boot = 0; #else - if (memoryGetDeviceBaseAddress(DEVICE0) && 0xfff00000 == CFG_MONITOR_BASE) + if (memoryGetDeviceBaseAddress(DEVICE0) && 0xfff00000 == CONFIG_SYS_MONITOR_BASE) sram_boot = 1; #endif - if (!sram_boot) - memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE); + memoryMapDeviceSpace(DEVICE0, CONFIG_SYS_DEV0_SPACE, CONFIG_SYS_DEV0_SIZE); - memoryMapDeviceSpace(DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE); - memoryMapDeviceSpace(DEVICE2, CFG_DEV2_SPACE, CFG_DEV2_SIZE); - memoryMapDeviceSpace(DEVICE3, CFG_DEV3_SPACE, CFG_DEV3_SIZE); + memoryMapDeviceSpace(DEVICE1, CONFIG_SYS_DEV1_SPACE, CONFIG_SYS_DEV1_SIZE); + memoryMapDeviceSpace(DEVICE2, CONFIG_SYS_DEV2_SPACE, CONFIG_SYS_DEV2_SIZE); + memoryMapDeviceSpace(DEVICE3, CONFIG_SYS_DEV3_SPACE, CONFIG_SYS_DEV3_SIZE); /* configure device timing */ -#ifdef CFG_DEV0_PAR +#ifdef CONFIG_SYS_DEV0_PAR if (!sram_boot) - GT_REG_WRITE(DEVICE_BANK0PARAMETERS, CFG_DEV0_PAR); + GT_REG_WRITE(DEVICE_BANK0PARAMETERS, CONFIG_SYS_DEV0_PAR); #endif -#ifdef CFG_DEV1_PAR - GT_REG_WRITE(DEVICE_BANK1PARAMETERS, CFG_DEV1_PAR); +#ifdef CONFIG_SYS_DEV1_PAR + GT_REG_WRITE(DEVICE_BANK1PARAMETERS, CONFIG_SYS_DEV1_PAR); #endif -#ifdef CFG_DEV2_PAR - GT_REG_WRITE(DEVICE_BANK2PARAMETERS, CFG_DEV2_PAR); +#ifdef CONFIG_SYS_DEV2_PAR + GT_REG_WRITE(DEVICE_BANK2PARAMETERS, CONFIG_SYS_DEV2_PAR); #endif #ifdef CONFIG_EVB64260 -#ifdef CFG_32BIT_BOOT_PAR +#ifdef CONFIG_SYS_32BIT_BOOT_PAR /* detect if we are booting from the 32 bit flash */ if (GTREGREAD(DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) { /* 32 bit boot flash */ - GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CFG_8BIT_BOOT_PAR); - GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_32BIT_BOOT_PAR); + GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR); + GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_32BIT_BOOT_PAR); } else { /* 8 bit boot flash */ - GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CFG_32BIT_BOOT_PAR); - GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR); + GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CONFIG_SYS_32BIT_BOOT_PAR); + GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR); } #else /* 8 bit boot flash only */ - GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR); + GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR); #endif #else /* CONFIG_EVB64260 not defined */ /* We are booting from 16-bit flash. */ - GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_16BIT_BOOT_PAR); + GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_16BIT_BOOT_PAR); #endif gt_cpu_config(); /* MPP setup */ - GT_REG_WRITE(MPP_CONTROL0, CFG_MPP_CONTROL_0); - GT_REG_WRITE(MPP_CONTROL1, CFG_MPP_CONTROL_1); - GT_REG_WRITE(MPP_CONTROL2, CFG_MPP_CONTROL_2); - GT_REG_WRITE(MPP_CONTROL3, CFG_MPP_CONTROL_3); + GT_REG_WRITE(MPP_CONTROL0, CONFIG_SYS_MPP_CONTROL_0); + GT_REG_WRITE(MPP_CONTROL1, CONFIG_SYS_MPP_CONTROL_1); + GT_REG_WRITE(MPP_CONTROL2, CONFIG_SYS_MPP_CONTROL_2); + GT_REG_WRITE(MPP_CONTROL3, CONFIG_SYS_MPP_CONTROL_3); - GT_REG_WRITE(GPP_LEVEL_CONTROL, CFG_GPP_LEVEL_CONTROL); - GT_REG_WRITE(SERIAL_PORT_MULTIPLEX, CFG_SERIAL_PORT_MUX); + GT_REG_WRITE(GPP_LEVEL_CONTROL, CONFIG_SYS_GPP_LEVEL_CONTROL); + GT_REG_WRITE(SERIAL_PORT_MULTIPLEX, CONFIG_SYS_SERIAL_PORT_MUX); return 0; } @@ -309,7 +309,7 @@ int board_early_init_f (void) int misc_init_r (void) { icache_enable(); -#ifdef CFG_L2 +#ifdef CONFIG_SYS_L2 l2cache_enable(); #endif @@ -330,9 +330,9 @@ after_reloc(ulong dest_addr) * back to the way they should be. (we're running from main * memory at this point now */ - if (memoryGetDeviceBaseAddress(DEVICE0) == CFG_MONITOR_BASE) { - memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE); - memoryMapDeviceSpace(BOOT_DEVICE, CFG_FLASH_BASE, _1M); + if (memoryGetDeviceBaseAddress(DEVICE0) == CONFIG_SYS_MONITOR_BASE) { + memoryMapDeviceSpace(DEVICE0, CONFIG_SYS_DEV0_SPACE, CONFIG_SYS_DEV0_SIZE); + memoryMapDeviceSpace(BOOT_DEVICE, CONFIG_SYS_FLASH_BASE, _1M); } /* now, jump to the main U-Boot board init code */ @@ -350,7 +350,7 @@ after_reloc(ulong dest_addr) int checkboard (void) { - puts ("Board: " CFG_BOARD_NAME "\n"); + puts ("Board: " CONFIG_SYS_BOARD_NAME "\n"); return (0); } @@ -365,29 +365,29 @@ debug_led(int led, int mode) if (mode == 1) { switch (led) { case 0: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x08000); + addr = (int *)((unsigned int)CONFIG_SYS_DEV1_SPACE | 0x08000); break; case 1: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x0c000); + addr = (int *)((unsigned int)CONFIG_SYS_DEV1_SPACE | 0x0c000); break; case 2: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x10000); + addr = (int *)((unsigned int)CONFIG_SYS_DEV1_SPACE | 0x10000); break; } } else if (mode == 0) { switch (led) { case 0: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x14000); + addr = (int *)((unsigned int)CONFIG_SYS_DEV1_SPACE | 0x14000); break; case 1: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x18000); + addr = (int *)((unsigned int)CONFIG_SYS_DEV1_SPACE | 0x18000); break; case 2: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x1c000); + addr = (int *)((unsigned int)CONFIG_SYS_DEV1_SPACE | 0x1c000); break; } } @@ -443,3 +443,9 @@ display_mem_map(void) printf(" BOOT: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n", base, size>>20, width); } + +int board_eth_init(bd_t *bis) +{ + gt6426x_eth_initialize(bis); + return 0; +} diff --git a/board/evb64260/flash.c b/board/evb64260/flash.c index 6ab23dc..115e8cd 100644 --- a/board/evb64260/flash.c +++ b/board/evb64260/flash.c @@ -46,7 +46,7 @@ int flash_erase_intel(flash_info_t *info, int s_first, int s_last); int write_word_intel(bank_addr_t addr, bank_word_t value); -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions @@ -67,16 +67,16 @@ flash_init (void) unsigned long base, flash_size; /* Init: no FLASHes known */ - for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { + for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; } /* the boot flash */ - base = CFG_FLASH_BASE; -#ifndef CFG_BOOT_FLASH_WIDTH -#define CFG_BOOT_FLASH_WIDTH 1 + base = CONFIG_SYS_FLASH_BASE; +#ifndef CONFIG_SYS_BOOT_FLASH_WIDTH +#define CONFIG_SYS_BOOT_FLASH_WIDTH 1 #endif - size_b0 = flash_get_size(CFG_BOOT_FLASH_WIDTH, (vu_long *)base, + size_b0 = flash_get_size(CONFIG_SYS_BOOT_FLASH_WIDTH, (vu_long *)base, &flash_info[0]); #ifndef CONFIG_P3G4 @@ -90,9 +90,9 @@ flash_init (void) base, size_b0, size_b0<<20); } - base = memoryGetDeviceBaseAddress(CFG_EXTRA_FLASH_DEVICE); - for(i=1;i<CFG_MAX_FLASH_BANKS;i++) { - unsigned long size = flash_get_size(CFG_EXTRA_FLASH_WIDTH, (vu_long *)base, &flash_info[i]); + base = memoryGetDeviceBaseAddress(CONFIG_SYS_EXTRA_FLASH_DEVICE); + for(i=1;i<CONFIG_SYS_MAX_FLASH_BANKS;i++) { + unsigned long size = flash_get_size(CONFIG_SYS_EXTRA_FLASH_WIDTH, (vu_long *)base, &flash_info[i]); #ifndef CONFIG_P3G4 printf("["); @@ -111,20 +111,20 @@ flash_init (void) base+=size; } -#if CFG_MONITOR_BASE >= CFG_FLASH_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - flash_get_info(CFG_MONITOR_BASE)); + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, + flash_get_info(CONFIG_SYS_MONITOR_BASE)); #endif -#ifdef CFG_ENV_IS_IN_FLASH +#ifdef CONFIG_ENV_IS_IN_FLASH /* ENV protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - flash_get_info(CFG_ENV_ADDR)); + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, + flash_get_info(CONFIG_ENV_ADDR)); #endif flash_size = size_b0 + size_b1; @@ -183,13 +183,13 @@ static flash_info_t *flash_get_info(ulong base) int i; flash_info_t * info; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i ++) { info = & flash_info[i]; if (info->start[0] <= base && base <= info->start[0] + info->size - 1) break; } - return i == CFG_MAX_FLASH_BANKS ? 0 : info; + return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; } /*----------------------------------------------------------------------- @@ -682,7 +682,7 @@ flash_erase (flash_info_t *info, int s_first, int s_last) addr = (volatile unsigned char *)(info->start[l_sect]); /* broken for 2x16: TODO */ while ((addr[0] & 0x80) != 0x80) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return 1; } @@ -846,7 +846,7 @@ write_word (flash_info_t *info, ulong dest, ulong data) /* data polling for D7 */ start = get_timer (0); while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { return (1); } } diff --git a/board/evb64260/intel_flash.c b/board/evb64260/intel_flash.c index ed6a2a0..994264a 100644 --- a/board/evb64260/intel_flash.c +++ b/board/evb64260/intel_flash.c @@ -157,7 +157,7 @@ write_word_intel(bank_addr_t addr, bank_word_t value) /* data polling for D7 */ start = get_timer (0); do { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { retval = 1; goto done; } @@ -234,7 +234,7 @@ flash_erase_intel(flash_info_t *info, int s_first, int s_last) do { now = get_timer(start); - if (now - estart > CFG_FLASH_ERASE_TOUT) { + if (now - estart > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout (sect %d)\n", sect); haderr = 1; break; diff --git a/board/evb64260/intel_flash.h b/board/evb64260/intel_flash.h index dc2aa00..cc3a339 100644 --- a/board/evb64260/intel_flash.h +++ b/board/evb64260/intel_flash.h @@ -42,7 +42,7 @@ /* ID and Lock Configuration */ #define CHIP_RD_ID_LOCK 0x01 /* Bit 0 of each byte */ #define CHIP_RD_ID_MAN 0x89 /* Manufacturer code = 0x89 */ -#define CHIP_RD_ID_DEV CFG_FLASH_ID +#define CHIP_RD_ID_DEV CONFIG_SYS_FLASH_ID /* dimensions */ #define CHIP_WIDTH 2 /* chips are in 16 bit mode */ diff --git a/board/evb64260/local.h b/board/evb64260/local.h index 3d9b443..8a3f4b2 100644 --- a/board/evb64260/local.h +++ b/board/evb64260/local.h @@ -26,7 +26,7 @@ /* #define CONFIG_BOOTCOMMAND */ /* #define CONFIG_RAMBOOTCOMMAND */ /* #define CONFIG_NFSBOOTCOMMAND */ -/* #define CFG_AUTOLOAD */ +/* #define CONFIG_SYS_AUTOLOAD */ /* #define CONFIG_PREBOOT */ /* These don't */ diff --git a/board/evb64260/misc.S b/board/evb64260/misc.S index 438dea6..f09528d 100644 --- a/board/evb64260/misc.S +++ b/board/evb64260/misc.S @@ -16,7 +16,7 @@ board_relocate_rom: mflr r7 /* update the location of the GT registers */ - lis r11, CFG_GT_REGS@h + lis r11, CONFIG_SYS_GT_REGS@h /* if we're using ECC, we must use the DMA engine to copy ourselves */ bl start_idma_transfer_0 bl wait_for_idma_0 @@ -29,12 +29,12 @@ board_relocate_rom: board_init_ecc: mflr r7 /* NOTE: r10 still contains the location we've been relocated to - * which happens to be TOP_OF_RAM - CFG_MONITOR_LEN */ + * which happens to be TOP_OF_RAM - CONFIG_SYS_MONITOR_LEN */ /* now that we're running from ram, init the rest of main memory * for ECC use */ - lis r8, CFG_MONITOR_LEN@h - ori r8, r8, CFG_MONITOR_LEN@l + lis r8, CONFIG_SYS_MONITOR_LEN@h + ori r8, r8, CONFIG_SYS_MONITOR_LEN@l divw r3, r10, r8 @@ -120,15 +120,15 @@ stop_idma_engine_0: blr #endif -#ifdef CFG_BOARD_ASM_INIT +#ifdef CONFIG_SYS_BOARD_ASM_INIT /* NOTE: trashes r3-r7 */ .globl board_asm_init board_asm_init: /* just move the GT registers to where they belong */ - lis r3, CFG_DFL_GT_REGS@h - ori r3, r3, CFG_DFL_GT_REGS@l - lis r4, CFG_GT_REGS@h - ori r4, r4, CFG_GT_REGS@l + lis r3, CONFIG_SYS_DFL_GT_REGS@h + ori r3, r3, CONFIG_SYS_DFL_GT_REGS@l + lis r4, CONFIG_SYS_GT_REGS@h + ori r4, r4, CONFIG_SYS_GT_REGS@l li r5, INTERNAL_SPACE_DECODE /* test to see if we've already moved */ diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c index 3b338c7..8c4a4c8 100644 --- a/board/evb64260/mpsc.c +++ b/board/evb64260/mpsc.c @@ -390,7 +390,7 @@ galbrg_set_baudrate(int channel, int rate) #if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4) /* from tclk */ - clock = (CFG_BUS_HZ/(16*rate)) - 1; + clock = (CONFIG_SYS_BUS_HZ/(16*rate)) - 1; #else clock = (3686400/(16*rate)) - 1; #endif diff --git a/board/evb64260/pci.c b/board/evb64260/pci.c index 59b9acb..582f24c 100644 --- a/board/evb64260/pci.c +++ b/board/evb64260/pci.c @@ -675,14 +675,14 @@ void pci_init_board (void) local_buses[0] = pci0_hose.first_busno; /* PCI memory space */ pci_set_region (pci0_hose.regions + 0, - CFG_PCI0_0_MEM_SPACE, - CFG_PCI0_0_MEM_SPACE, - CFG_PCI0_MEM_SIZE, PCI_REGION_MEM); + CONFIG_SYS_PCI0_0_MEM_SPACE, + CONFIG_SYS_PCI0_0_MEM_SPACE, + CONFIG_SYS_PCI0_MEM_SIZE, PCI_REGION_MEM); /* PCI I/O space */ pci_set_region (pci0_hose.regions + 1, - CFG_PCI0_IO_SPACE_PCI, - CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE, PCI_REGION_IO); + CONFIG_SYS_PCI0_IO_SPACE_PCI, + CONFIG_SYS_PCI0_IO_SPACE, CONFIG_SYS_PCI0_IO_SIZE, PCI_REGION_IO); pci_set_ops (&pci0_hose, pci_hose_read_config_byte_via_dword, @@ -720,14 +720,14 @@ void pci_init_board (void) /* PCI memory space */ pci_set_region (pci1_hose.regions + 0, - CFG_PCI1_0_MEM_SPACE, - CFG_PCI1_0_MEM_SPACE, - CFG_PCI1_MEM_SIZE, PCI_REGION_MEM); + CONFIG_SYS_PCI1_0_MEM_SPACE, + CONFIG_SYS_PCI1_0_MEM_SPACE, + CONFIG_SYS_PCI1_MEM_SIZE, PCI_REGION_MEM); /* PCI I/O space */ pci_set_region (pci1_hose.regions + 1, - CFG_PCI1_IO_SPACE_PCI, - CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE, PCI_REGION_IO); + CONFIG_SYS_PCI1_IO_SPACE_PCI, + CONFIG_SYS_PCI1_IO_SPACE, CONFIG_SYS_PCI1_IO_SIZE, PCI_REGION_IO); pci_set_ops (&pci1_hose, pci_hose_read_config_byte_via_dword, diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c index 9ae4465..e2f0769 100644 --- a/board/evb64260/sdram_init.c +++ b/board/evb64260/sdram_init.c @@ -300,7 +300,7 @@ static int check_dimm (uchar slot, sdram_info_t * info) DP (printf ("tpar set to: %d\n", info->tpar)); -#ifdef CFG_BROKEN_CL2 +#ifdef CONFIG_SYS_BROKEN_CL2 if (info->tpar == 2) { info->tpar = 3; DP (printf ("tpar fixed-up to: %d\n", info->tpar)); @@ -598,7 +598,7 @@ phys_size_t initdram (int board_type) * limitation: we only support 256M per bank due to * us only having 1 BAT for all DRAM */ - for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) { + for (bank_no = 0; bank_no < CONFIG_SYS_DRAM_BANKS; bank_no++) { /* skip over banks that are not populated */ if (!checkbank[bank_no]) continue; @@ -617,7 +617,7 @@ phys_size_t initdram (int board_type) * space. */ dimm_info[0].banks = dimm_info[1].banks = 0; - for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) { + for (bank_no = 0; bank_no < CONFIG_SYS_DRAM_BANKS; bank_no++) { if (!checkbank[bank_no]) continue; diff --git a/board/evb64260/serial.c b/board/evb64260/serial.c index f1bcab3..9d71115 100644 --- a/board/evb64260/serial.c +++ b/board/evb64260/serial.c @@ -31,7 +31,7 @@ #include <command.h> #include <galileo/memory.h> -#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2) +#if (defined CONFIG_SYS_INIT_CHAN1) || (defined CONFIG_SYS_INIT_CHAN2) #include <ns16550.h> #endif @@ -41,26 +41,26 @@ DECLARE_GLOBAL_DATA_PTR; -#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2) -const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1, - (NS16550_t) CFG_NS16550_COM2 }; +#if (defined CONFIG_SYS_INIT_CHAN1) || (defined CONFIG_SYS_INIT_CHAN2) +const NS16550_t COM_PORTS[] = { (NS16550_t) CONFIG_SYS_NS16550_COM1, + (NS16550_t) CONFIG_SYS_NS16550_COM2 }; #endif #ifdef CONFIG_MPSC int serial_init (void) { -#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2) - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; +#if (defined CONFIG_SYS_INIT_CHAN1) || (defined CONFIG_SYS_INIT_CHAN2) + int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate; #endif mpsc_init(gd->baudrate); /* init the DUART chans so that KGDB in the kernel can use them */ -#ifdef CFG_INIT_CHAN1 +#ifdef CONFIG_SYS_INIT_CHAN1 NS16550_reinit(COM_PORTS[0], clock_divisor); #endif -#ifdef CFG_INIT_CHAN2 +#ifdef CONFIG_SYS_INIT_CHAN2 NS16550_reinit(COM_PORTS[1], clock_divisor); #endif return (0); @@ -97,12 +97,12 @@ serial_setbrg (void) int serial_init (void) { - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; + int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate; -#ifdef CFG_INIT_CHAN1 +#ifdef CONFIG_SYS_INIT_CHAN1 (void)NS16550_init(COM_PORTS[0], clock_divisor); #endif -#ifdef CFG_INIT_CHAN2 +#ifdef CONFIG_SYS_INIT_CHAN2 (void)NS16550_init(COM_PORTS[1], clock_divisor); #endif @@ -113,32 +113,32 @@ void serial_putc(const char c) { if (c == '\n') - NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r'); + NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], '\r'); - NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c); + NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], c); } int serial_getc(void) { - return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]); + return NS16550_getc(COM_PORTS[CONFIG_SYS_DUART_CHAN]); } int serial_tstc(void) { - return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]); + return NS16550_tstc(COM_PORTS[CONFIG_SYS_DUART_CHAN]); } void serial_setbrg (void) { - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; + int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate; -#ifdef CFG_INIT_CHAN1 +#ifdef CONFIG_SYS_INIT_CHAN1 NS16550_reinit(COM_PORTS[0], clock_divisor); #endif -#ifdef CFG_INIT_CHAN2 +#ifdef CONFIG_SYS_INIT_CHAN2 NS16550_reinit(COM_PORTS[1], clock_divisor); #endif } diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds index 1a95755..ff2d8b7 100644 --- a/board/evb64260/u-boot.lds +++ b/board/evb64260/u-boot.lds @@ -60,7 +60,7 @@ SECTIONS /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ -/* common/environment.o(.text) */ +/* common/env_embedded.o(.text) */ *(.text) *(.fixup) @@ -131,6 +131,7 @@ SECTIONS *(.dynbss) *(.bss) *(COMMON) + . = ALIGN(4); } _end = . ; PROVIDE (end = .); diff --git a/board/evb64260/zuma_pbb.c b/board/evb64260/zuma_pbb.c index 296e461..1d03570 100644 --- a/board/evb64260/zuma_pbb.c +++ b/board/evb64260/zuma_pbb.c @@ -149,8 +149,10 @@ void zuma_init_pbb (void) pci_read_config_dword (dev, PCI_BASE_ADDRESS_0, &iobase); - zuma_pbb_reg = - (PBB_DMA_REG_MAP *) (iobase & PCI_BASE_ADDRESS_MEM_MASK); + iobase &= PCI_BASE_ADDRESS_MEM_MASK; + + zuma_pbb_reg = (PBB_DMA_REG_MAP *)iobase; + if (!zuma_pbb_reg) { printf ("zuma pbb bar none! (hah hah, get it?)\n"); diff --git a/board/evb64260/zuma_pbb_mbox.c b/board/evb64260/zuma_pbb_mbox.c index 6f5df6e..8e38102 100644 --- a/board/evb64260/zuma_pbb_mbox.c +++ b/board/evb64260/zuma_pbb_mbox.c @@ -165,7 +165,9 @@ int zuma_mbox_init(void) pci_read_config_dword(zuma_mbox_dev.dev, PCI_BASE_ADDRESS_0, &iobase); - zuma_mbox_dev.sip = (PBB_DMA_REG_MAP *) (iobase & PCI_BASE_ADDRESS_MEM_MASK); + iobase &= PCI_BASE_ADDRESS_MEM_MASK; + + zuma_mbox_dev.sip = (PBB_DMA_REG_MAP *)iobase; zuma_mbox_dev.sip->int_mask.word=0; |