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authorwdenk <wdenk>2003-03-06 00:58:30 +0000
committerwdenk <wdenk>2003-03-06 00:58:30 +0000
commitdb2f721ffcf9693086a7e5c6c7015f2019e7f52e (patch)
tree1d755e28c035c1247f30b570ed239a097a7d13c8 /board/evb64260/pci.c
parent43d9616cffb4a130e1620e3e33fc9bc1bcabe399 (diff)
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* Patch by Rune Torgersen, 13 Feb 2003:
Add support for Motorola MPC8266ADS board * Patch by Kyle Harris, 19 Feb 2003: patches for the Intel lubbock board: memsetup.S - general cleanup (based on Robert's csb226 code) flash.c - overhaul, actually works now lubbock.c - fix init funcs to return proper value * Patch by Kenneth Johansson, 26 Feb 2003: - Fixed off by one in RFTA calculation. - No need to abort when LDF is lower than we can program it's only minimum timing so clamp it to what we can do. - Takes function pointer to function for reading the spd_nvram. Usefull for faking data or hardcode a module without the nvram. - fix other user for above change - fix some comments. * Patches by Brian Waite, 26 Feb 2003: - fix port for evb64260 board - fix PCI for evb64260 board - fix PCI scan * Patch by Reinhard Meyer, 1 Mar 2003: Add support for EMK TOP860 Module * Patch by Yuli Barcohen, 02 Mar 2003: Add SPD EEPROM support for MPC8260ADS board
Diffstat (limited to 'board/evb64260/pci.c')
-rw-r--r--board/evb64260/pci.c33
1 files changed, 26 insertions, 7 deletions
diff --git a/board/evb64260/pci.c b/board/evb64260/pci.c
index 585906d..5f3b154 100644
--- a/board/evb64260/pci.c
+++ b/board/evb64260/pci.c
@@ -52,6 +52,7 @@ static const unsigned int pci_scs_bank_size[2][4] = {
static const unsigned int pci_p2p_configuration[] = {
PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION};
+static unsigned int local_buses[] = { 0, 0};
/********************************************************************
* pciWriteConfigReg - Write to a PCI configuration register
* - Make sure the GT is configured as a master before writing
@@ -74,7 +75,7 @@ void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset,unsigned int pciDev
{
volatile unsigned int DataForAddrReg;
unsigned int functionNum;
- unsigned int busNum = 0;
+ unsigned int busNum = PCI_BUS(pciDevNum);
unsigned int addr;
if(pciDevNum > 32) /* illegal device Number */
@@ -117,7 +118,7 @@ unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,unsigned in
volatile unsigned int DataForAddrReg;
unsigned int data;
unsigned int functionNum;
- unsigned int busNum = 0;
+ unsigned int busNum = PCI_BUS(pciDevNum);
if(pciDevNum > 32) /* illegal device Number */
return 0xffffffff;
@@ -531,16 +532,32 @@ static int gt_read_config_dword(struct pci_controller *hose,
pci_dev_t dev,
int offset, u32* value)
{
- *value = pciReadConfigReg((PCI_HOST) hose->cfg_addr, offset, PCI_DEV(dev));
- return 0;
+ int bus = PCI_BUS(dev);
+
+ if ((bus == local_buses[0]) || (bus == local_buses[1])){
+ *value = pciReadConfigReg((PCI_HOST) hose->cfg_addr, offset,
+ PCI_DEV(dev));
+ } else {
+ *value = pciOverBridgeReadConfigReg((PCI_HOST) hose->cfg_addr,
+ offset, PCI_DEV(dev), bus);
+ }
+ return 0;
}
static int gt_write_config_dword(struct pci_controller *hose,
pci_dev_t dev,
int offset, u32 value)
{
- pciWriteConfigReg((PCI_HOST)hose->cfg_addr, offset, PCI_DEV(dev), value);
- return 0;
+ int bus = PCI_BUS(dev);
+
+ if ((bus == local_buses[0]) || (bus == local_buses[1])){
+ pciWriteConfigReg((PCI_HOST)hose->cfg_addr, offset,
+ PCI_DEV(dev), value);
+ } else {
+ pciOverBridgeWriteConfigReg((PCI_HOST)hose->cfg_addr, offset,
+ PCI_DEV(dev), value, bus);
+ }
+ return 0;
}
/*
@@ -603,7 +620,7 @@ pci_init_board(void)
pci0_hose.first_busno = 0;
pci0_hose.last_busno = 0xff;
-
+ local_buses[0] = pci0_hose.first_busno;
/* PCI memory space */
pci_set_region(pci0_hose.regions + 0,
CFG_PCI0_0_MEM_SPACE,
@@ -647,6 +664,8 @@ pci_init_board(void)
pci1_hose.first_busno = pci0_hose.last_busno + 1;
pci1_hose.last_busno = 0xff;
+ pci1_hose.current_busno = pci0_hose.current_busno;
+ local_buses[1] = pci1_hose.first_busno;
/* PCI memory space */
pci_set_region(pci1_hose.regions + 0,