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| author | Robby Cai <R63905@freescale.com> | 2011-04-15 18:45:45 +0800 |
|---|---|---|
| committer | Robby Cai <R63905@freescale.com> | 2011-04-16 14:19:34 +0800 |
| commit | 1396e7e5fc7bdf6ff39fdcc6bafe1c9772b529b9 (patch) | |
| tree | ef8f163edfb2d05803f5c2a8043c935afc52e087 /board/evb64260/mpsc.h | |
| parent | 6d20b6a7428e51a0b2abcbaf291287bcb38aba63 (diff) | |
| download | u-boot-imx-1396e7e5fc7bdf6ff39fdcc6bafe1c9772b529b9.zip u-boot-imx-1396e7e5fc7bdf6ff39fdcc6bafe1c9772b529b9.tar.gz u-boot-imx-1396e7e5fc7bdf6ff39fdcc6bafe1c9772b529b9.tar.bz2 | |
ENGR00142247 MX50: Add PD+3 routine for all DDR types
PD+3 routine help test pass for ddr with higher freq.
Tested on
ARM2 board (mDDR, DDR2)
RDP board (LPDDR2 from both vendors)
RD3 board (LPDDR2)
Signed-off-by: Robby Cai <R63905@freescale.com>
Diffstat (limited to 'board/evb64260/mpsc.h')
0 files changed, 0 insertions, 0 deletions