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| author | Wolfgang Denk <wd@denx.de> | 2008-12-13 00:36:25 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-12-13 00:36:25 +0100 |
| commit | 89d56f5503eed351efe5ab0b4dd0f1e888fd2336 (patch) | |
| tree | b1005c9362d07c381cbf165a2c0dc0ab1f54e41e /board/esd/pmc440/pmc440.c | |
| parent | 3680aed04f6c971b5f5d66ca7ea82d68f81b0f41 (diff) | |
| parent | 19ef4f7a6ef3b725aa9fe4b4f5fb676a84160172 (diff) | |
| download | u-boot-imx-89d56f5503eed351efe5ab0b4dd0f1e888fd2336.zip u-boot-imx-89d56f5503eed351efe5ab0b4dd0f1e888fd2336.tar.gz u-boot-imx-89d56f5503eed351efe5ab0b4dd0f1e888fd2336.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Diffstat (limited to 'board/esd/pmc440/pmc440.c')
| -rw-r--r-- | board/esd/pmc440/pmc440.c | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c index 8563d7d..3824105 100644 --- a/board/esd/pmc440/pmc440.c +++ b/board/esd/pmc440/pmc440.c @@ -107,7 +107,7 @@ int board_early_init_f(void) * Setup the GPIO pins * TODO: setup GPIOs via CONFIG_SYS_4xx_GPIO_TABLE in board's config file */ - out32(GPIO0_OR, 0x40000002); + out32(GPIO0_OR, 0x40000102); out32(GPIO0_TCR, 0x4c90011f); out32(GPIO0_OSRL, 0x28051400); out32(GPIO0_OSRH, 0x55005000); @@ -755,17 +755,31 @@ int post_hotkeys_pressed(void) #ifdef CONFIG_RESET_PHY_R void reset_phy(void) { + char *s; + unsigned short val_method, val_behavior; + + /* special LED setup for NGCC/CANDES */ + if ((s = getenv("bd_type")) && + ((!strcmp(s, "ngcc")) || (!strcmp(s, "candes")))) { + val_method = 0x0e0a; + val_behavior = 0x0cf2; + } else { + /* PMC440 standard type */ + val_method = 0x0e10; + val_behavior = 0x0cf0; + } + if (miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x1f, 0x0001) == 0) { miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x11, 0x0010); - miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x11, 0x0df0); - miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x10, 0x0e10); + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x11, val_behavior); + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x10, val_method); miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x1f, 0x0000); } if (miiphy_write("ppc_4xx_eth1", CONFIG_PHY1_ADDR, 0x1f, 0x0001) == 0) { miiphy_write("ppc_4xx_eth1", CONFIG_PHY1_ADDR, 0x11, 0x0010); - miiphy_write("ppc_4xx_eth1", CONFIG_PHY1_ADDR, 0x11, 0x0df0); - miiphy_write("ppc_4xx_eth1", CONFIG_PHY1_ADDR, 0x10, 0x0e10); + miiphy_write("ppc_4xx_eth1", CONFIG_PHY1_ADDR, 0x11, val_behavior); + miiphy_write("ppc_4xx_eth1", CONFIG_PHY1_ADDR, 0x10, val_method); miiphy_write("ppc_4xx_eth1", CONFIG_PHY1_ADDR, 0x1f, 0x0000); } } |