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author | Wolfgang Denk <wd@denx.de> | 2009-10-03 23:40:35 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2009-10-03 23:40:35 +0200 |
commit | 311c19ccb5783a1de71fd5042eeadfbe9688f597 (patch) | |
tree | 02b3d3c25b35eaba3373c1f9176f3b87bf48aec5 /board/esd/pmc440/init.S | |
parent | eb4bf4c077dbf69a94a1697c784bc1f02aaab952 (diff) | |
parent | 3b4bd2d75c4b3c1a4570f47ffaaed66f56a78ff4 (diff) | |
download | u-boot-imx-311c19ccb5783a1de71fd5042eeadfbe9688f597.zip u-boot-imx-311c19ccb5783a1de71fd5042eeadfbe9688f597.tar.gz u-boot-imx-311c19ccb5783a1de71fd5042eeadfbe9688f597.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Diffstat (limited to 'board/esd/pmc440/init.S')
-rw-r--r-- | board/esd/pmc440/init.S | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/board/esd/pmc440/init.S b/board/esd/pmc440/init.S index 26a8282..6585fed 100644 --- a/board/esd/pmc440/init.S +++ b/board/esd/pmc440/init.S @@ -23,7 +23,7 @@ #include <asm-ppc/mmu.h> #include <config.h> -/************************************************************************** +/* * TLB TABLE * * This table is used by the cpu boot code to setup the initial tlb @@ -32,7 +32,7 @@ * * Pointer to the table is returned in r1 * - *************************************************************************/ + */ .section .bootpg,"ax" .globl tlbtab @@ -49,12 +49,7 @@ tlbtab: tlbentry( CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 1, AC_R|AC_W|AC_X|SA_G ) #endif - /* TLB-entry for DDR SDRAM (Up to 2GB) */ -#ifdef CONFIG_4xx_DCACHE - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G) -#else - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) -#endif + /* TLB entries for DDR2 SDRAM are generated dynamically */ #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ |