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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/esd/pmc405/pmc405.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/esd/pmc405/pmc405.c')
| -rw-r--r-- | board/esd/pmc405/pmc405.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c index 90a212b..c0781dc 100644 --- a/board/esd/pmc405/pmc405.c +++ b/board/esd/pmc405/pmc405.c @@ -72,23 +72,23 @@ int board_early_init_f (void) * Setup GPIO pins */ - mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_FPGA_INIT | \ - CFG_FPGA_DONE | \ - CFG_XEREADY | \ - CFG_NONMONARCH | \ - CFG_REV1_2) << 5)); + mtdcr(cntrl0, mfdcr(cntrl0) | ((CONFIG_SYS_FPGA_INIT | \ + CONFIG_SYS_FPGA_DONE | \ + CONFIG_SYS_XEREADY | \ + CONFIG_SYS_NONMONARCH | \ + CONFIG_SYS_REV1_2) << 5)); - if (!(in32(GPIO0_IR) & CFG_REV1_2)) { + if (!(in32(GPIO0_IR) & CONFIG_SYS_REV1_2)) { /* rev 1.2 boards */ - mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_INTA_FAKE | \ - CFG_SELF_RST) << 5)); + mtdcr(cntrl0, mfdcr(cntrl0) | ((CONFIG_SYS_INTA_FAKE | \ + CONFIG_SYS_SELF_RST) << 5)); } out32(GPIO0_OR, 0); - out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA | CFG_XEREADY); /* setup for output */ + out32(GPIO0_TCR, CONFIG_SYS_FPGA_PRG | CONFIG_SYS_FPGA_CLK | CONFIG_SYS_FPGA_DATA | CONFIG_SYS_XEREADY); /* setup for output */ /* - check if rev1_2 is low, then: - * - set/reset CFG_INTA_FAKE/CFG_SELF_RST in TCR to assert INTA# or SELFRST# + * - set/reset CONFIG_SYS_INTA_FAKE/CONFIG_SYS_SELF_RST in TCR to assert INTA# or SELFRST# */ return 0; @@ -104,7 +104,7 @@ int misc_init_r (void) gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; gd->bd->bi_flashoffset = 0; - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_XEREADY); /* deassert EREADY# */ + out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_XEREADY); /* deassert EREADY# */ return (0); } @@ -112,13 +112,13 @@ ushort pmc405_pci_subsys_deviceid(void) { ulong val; val = in32(GPIO0_IR); - if (!(val & CFG_REV1_2)) { /* low=rev1.2 */ - if (val & CFG_NONMONARCH) { /* monarch# signal */ - return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH; + if (!(val & CONFIG_SYS_REV1_2)) { /* low=rev1.2 */ + if (val & CONFIG_SYS_NONMONARCH) { /* monarch# signal */ + return CONFIG_SYS_PCI_SUBSYS_DEVICEID_NONMONARCH; } - return CFG_PCI_SUBSYS_DEVICEID_MONARCH; + return CONFIG_SYS_PCI_SUBSYS_DEVICEID_MONARCH; } - return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH; + return CONFIG_SYS_PCI_SUBSYS_DEVICEID_NONMONARCH; } /* @@ -140,9 +140,9 @@ int checkboard (void) } val = in32(GPIO0_IR); - if (!(val & CFG_REV1_2)) { /* low=rev1.2 */ + if (!(val & CONFIG_SYS_REV1_2)) { /* low=rev1.2 */ puts(" rev1.2 ("); - if (val & CFG_NONMONARCH) { /* monarch# signal */ + if (val & CONFIG_SYS_NONMONARCH) { /* monarch# signal */ puts("non-"); } puts("monarch)"); |