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author | Valentin Longchamp <valentin.longchamp@keymile.com> | 2014-08-19 15:40:04 +0200 |
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committer | York Sun <yorksun@freescale.com> | 2014-08-20 10:44:42 -0700 |
commit | f38391793f1a5c62d1c72a647f15a88e7c22ef11 (patch) | |
tree | 47470cb9fd7fa5ecd77f601429ea770779e9290a /board/esd/plu405 | |
parent | 8af353bb0efa3152396ecca99ba9e91633bdb8a0 (diff) | |
download | u-boot-imx-f38391793f1a5c62d1c72a647f15a88e7c22ef11.zip u-boot-imx-f38391793f1a5c62d1c72a647f15a88e7c22ef11.tar.gz u-boot-imx-f38391793f1a5c62d1c72a647f15a88e7c22ef11.tar.bz2 |
kmp204x: reset the Zarlink clocking chips at power up only
There is the requirement on the chassis's backplane that when the clocks
have been enabled, they then should not disappear.
Resetting the Zarlink clocking chips at unit reset violates this
requirement because the backplane clocks are not supplied during the
reset time.
To avoid this side effect, both the Zarlink clocking chips are reset
only at power up.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Diffstat (limited to 'board/esd/plu405')
0 files changed, 0 insertions, 0 deletions