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| author | Matthias Fuchs <matthias.fuchs@esd-electronics.com> | 2009-01-02 12:16:35 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-01-14 11:17:52 +0100 |
| commit | fceebb45a0b97e92f9889861f8c3b9cb885e706f (patch) | |
| tree | cb19f018f65852c403782c589958b1047b92cc13 /board/esd/plu405 | |
| parent | 5f01ea63a6c263767f548b4f61880b08f7850ffc (diff) | |
| download | u-boot-imx-fceebb45a0b97e92f9889861f8c3b9cb885e706f.zip u-boot-imx-fceebb45a0b97e92f9889861f8c3b9cb885e706f.tar.gz u-boot-imx-fceebb45a0b97e92f9889861f8c3b9cb885e706f.tar.bz2 | |
ppc4xx: Enable auto RS485 mode on PLU405 boards
This patch turns on the auto RS485 mode in the 2nd external
uart on PLU405 boards. This is a special mode of the used
Exar XR16C2850 uart. Because these boards only have a 485 physical
layer connected it's a good idea to turn it on by default.
Signed-off-by: Matthias Fuchs <mf@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/esd/plu405')
| -rw-r--r-- | board/esd/plu405/plu405.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c index 61186a8..85057a2 100644 --- a/board/esd/plu405/plu405.c +++ b/board/esd/plu405/plu405.c @@ -104,6 +104,7 @@ int misc_init_r (void) unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); unsigned char *dst; + unsigned char fctr; ulong len = sizeof(fpgadata); int status; int index; @@ -203,6 +204,15 @@ int misc_init_r (void) out_8(duart0_mcr, 0x08); out_8(duart1_mcr, 0x08); + /* + * Enable auto RS485 mode in 2nd external uart + */ + out_8((void *)DUART1_BA + 3, 0xbf); /* write LCR */ + fctr = in_8((void *)DUART1_BA + 1); /* read FCTR */ + fctr |= 0x08; /* enable RS485 mode */ + out_8((void *)DUART1_BA + 1, fctr); /* write FCTR */ + out_8((void *)DUART1_BA + 3, 0); /* write LCR */ + return (0); } |