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authorstroese <stroese>2003-03-25 14:41:35 +0000
committerstroese <stroese>2003-03-25 14:41:35 +0000
commitd69b100e7038ccf7a760dad973ec4a7a35c81e9c (patch)
tree5ef1e6707d1cd47e9306dd9347bbb0a0d82c471d /board/esd/pci405/pci405.c
parent5d5d44e71787014b409eca6714229d3357c6c000 (diff)
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esd PCI405 updated.
Diffstat (limited to 'board/esd/pci405/pci405.c')
-rw-r--r--board/esd/pci405/pci405.c73
1 files changed, 35 insertions, 38 deletions
diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c
index ed86c02..a4f6974 100644
--- a/board/esd/pci405/pci405.c
+++ b/board/esd/pci405/pci405.c
@@ -29,25 +29,15 @@
#include <pci.h>
#include <405gp_pci.h>
+#include "pci405.h"
+
+
/* ------------------------------------------------------------------------- */
#if 0
#define FPGA_DEBUG
#endif
-#define PCI_RECONFIG_MAGIC 0x07081967
-
-
-struct pci_config_regs {
- unsigned short command;
- unsigned char latency_timer;
- unsigned char int_line;
- unsigned long bar1;
- unsigned long bar2;
- unsigned long magic;
-};
-
-
/* fpga configuration data - generated by bin2cc */
const unsigned char fpgadata[] =
{
@@ -114,6 +104,8 @@ int misc_init_r (void)
int index;
int i;
struct pci_config_regs *pci_regs;
+ unsigned int *ptr;
+ unsigned int *magic;
/*
* On PCI-405 the environment is saved in eeprom!
@@ -171,32 +163,33 @@ int misc_init_r (void)
putc ('\n');
/*
- * Rewrite pci config regs (only after soft-reset with magic set)
+ * Reset FPGA via FPGA_DATA pin
*/
- pci_regs = (struct pci_config_regs *)0x10;
- if (pci_regs->magic == PCI_RECONFIG_MAGIC) {
- puts("PCI: Found magic, rewriting config regs...\n");
- pci_write_config_word(PCIDEVID_405GP, PCI_COMMAND,
- pci_regs->command);
- pci_write_config_byte(PCIDEVID_405GP, PCI_LATENCY_TIMER,
- pci_regs->latency_timer);
- pci_write_config_byte(PCIDEVID_405GP, PCI_INTERRUPT_LINE,
- pci_regs->int_line);
- pci_write_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_1,
- pci_regs->bar1);
- pci_write_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_2,
- pci_regs->bar2);
+ SET_FPGA(FPGA_PRG | FPGA_CLK);
+ udelay(1000); /* wait 1ms */
+ SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+ udelay(1000); /* wait 1ms */
+
+ /*
+ * Check if magic for pci reconfig is written
+ */
+ magic = (unsigned int *)0x00000004;
+ if (*magic == PCI_RECONFIG_MAGIC) {
+ /*
+ * Rewrite pci config regs (only after soft-reset with magic set)
+ */
+ ptr = (unsigned int *)PCI_REGS_ADDR;
+ if (crc32(0, (char *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4) == *ptr) {
+ puts("Restoring PCI Configurations Regs!\n");
+ ptr = (unsigned int *)PCI_REGS_ADDR + 1;
+ for (i=0; i<0x40; i+=4) {
+ pci_write_config_dword(PCIDEVID_405GP, i, *ptr++);
+ }
+ }
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+
+ *magic = 0; /* clear pci reconfig magic again */
}
- pci_regs->magic = 0; /* clear magic again */
-
-#if 0 /* test-only */
- pci_read_config_word(PCIDEVID_405GP, PCI_COMMAND, &(pci_regs->command));
- pci_read_config_byte(PCIDEVID_405GP, PCI_LATENCY_TIMER, &(pci_regs->latency_timer));
- pci_read_config_byte(PCIDEVID_405GP, PCI_INTERRUPT_LINE, &(pci_regs->int_line));
- pci_read_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_1, &(pci_regs->bar1));
- pci_read_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_2, &(pci_regs->bar2));
- pci_regs->magic = PCI_RECONFIG_MAGIC; /* set magic */
-#endif
free(dst);
return (0);
@@ -215,7 +208,7 @@ int checkboard (void)
puts ("Board: ");
if (i == -1) {
- puts ("### No HW ID - assuming CPCI405");
+ puts ("### No HW ID - assuming PCI405");
} else {
puts (str);
}
@@ -238,7 +231,11 @@ long int initdram (int board_type)
printf("strap=%x\n", mfdcr(strap)); /* test-only */
#endif
+#if 0 /* test-only: all PCI405 version must report 16mb */
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+#else
+ return (16*1024*1024);
+#endif
}
/* ------------------------------------------------------------------------- */