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author | Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu> | 2010-01-20 08:00:11 +0100 |
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committer | Tom Rix <Tom.Rix@windriver.com> | 2010-01-23 08:15:50 -0600 |
commit | a3f3897bfda9b4729785bdd328b3b7f30417a67f (patch) | |
tree | ded9dced10adeea568982bf634b9dc7d3c00f537 /board/esd/meesc/meesc.c | |
parent | 7da692360414d07027c6cf564a15d79cd9dcf488 (diff) | |
download | u-boot-imx-a3f3897bfda9b4729785bdd328b3b7f30417a67f.zip u-boot-imx-a3f3897bfda9b4729785bdd328b3b7f30417a67f.tar.gz u-boot-imx-a3f3897bfda9b4729785bdd328b3b7f30417a67f.tar.bz2 |
at91: Enable slow master clock on meesc board
Normally the processor clock has a divisor of 2.
In some cases this this needs to be set to 4.
Check the user has set environment mdiv to 4 to change the divisor.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Diffstat (limited to 'board/esd/meesc/meesc.c')
-rw-r--r-- | board/esd/meesc/meesc.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index efba60d..a1b66cb 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -219,6 +219,32 @@ u32 get_board_rev(void) } #endif +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + char *str; + char buf[32]; + + /* + * Normally the processor clock has a divisor of 2. + * In some cases this this needs to be set to 4. + * Check the user has set environment mdiv to 4 to change the divisor. + */ + if ((str = getenv("mdiv")) && (strcmp(str, "4") == 0)) { + at91_sys_write(AT91_PMC_MCKR, + (at91_sys_read(AT91_PMC_MCKR) & ~AT91_PMC_MDIV) | + AT91SAM9_PMC_MDIV_4); + at91_clock_init(0); + serial_setbrg(); + /* Notify the user that the clock is not default */ + printf("Setting master clock to %s MHz\n", + strmhz(buf, get_mck_clk_rate())); + } + + return 0; +} +#endif /* CONFIG_MISC_INIT_R */ + int board_init(void) { /* Peripheral Clock Enable Register */ |