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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-12-17 16:53:07 +0100
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-12-17 16:53:07 +0100
commitcb5473205206c7f14cbb1e747f28ec75b48826e2 (patch)
tree8f4808d60917100b18a10b05230f7638a0a9bbcc /board/esd/du440/du440.h
parentbaf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff)
parent92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff)
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Merge branch 'fixes' into cleanups
Conflicts: board/atmel/atngw100/atngw100.c board/atmel/atstk1000/atstk1000.c cpu/at32ap/at32ap700x/gpio.c include/asm-avr32/arch-at32ap700x/clk.h include/configs/atngw100.h include/configs/atstk1002.h include/configs/atstk1003.h include/configs/atstk1004.h include/configs/atstk1006.h include/configs/favr-32-ezkit.h include/configs/hammerhead.h include/configs/mimc200.h
Diffstat (limited to 'board/esd/du440/du440.h')
-rw-r--r--board/esd/du440/du440.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/board/esd/du440/du440.h b/board/esd/du440/du440.h
index 83fdac7..a124a7e 100644
--- a/board/esd/du440/du440.h
+++ b/board/esd/du440/du440.h
@@ -20,18 +20,18 @@
#define SDR0_USB0 0x0320 /* USB Control Register */
-#define CFG_GPIO0_EP_EEP (0x80000000 >> 23) /* GPIO0_23 */
-#define CFG_GPIO1_DCF77 (0x80000000 >> (42-32)) /* GPIO1_42 */
+#define CONFIG_SYS_GPIO0_EP_EEP (0x80000000 >> 23) /* GPIO0_23 */
+#define CONFIG_SYS_GPIO1_DCF77 (0x80000000 >> (42-32)) /* GPIO1_42 */
-#define CFG_GPIO1_IORSTN (0x80000000 >> (55-32)) /* GPIO1_55 */
-#define CFG_GPIO1_IORST2N (0x80000000 >> (47-32)) /* GPIO1_47 */
+#define CONFIG_SYS_GPIO1_IORSTN (0x80000000 >> (55-32)) /* GPIO1_55 */
+#define CONFIG_SYS_GPIO1_IORST2N (0x80000000 >> (47-32)) /* GPIO1_47 */
-#define CFG_GPIO1_HWVER_MASK 0x000000f0 /* GPIO1_56-59 */
-#define CFG_GPIO1_HWVER_SHIFT 4
-#define CFG_GPIO1_LEDUSR1 0x00000008 /* GPIO1_60 */
-#define CFG_GPIO1_LEDUSR2 0x00000004 /* GPIO1_61 */
-#define CFG_GPIO1_LEDPOST 0x00000002 /* GPIO1_62 */
-#define CFG_GPIO1_LEDDU 0x00000001 /* GPIO1_63 */
+#define CONFIG_SYS_GPIO1_HWVER_MASK 0x000000f0 /* GPIO1_56-59 */
+#define CONFIG_SYS_GPIO1_HWVER_SHIFT 4
+#define CONFIG_SYS_GPIO1_LEDUSR1 0x00000008 /* GPIO1_60 */
+#define CONFIG_SYS_GPIO1_LEDUSR2 0x00000004 /* GPIO1_61 */
+#define CONFIG_SYS_GPIO1_LEDPOST 0x00000002 /* GPIO1_62 */
+#define CONFIG_SYS_GPIO1_LEDDU 0x00000001 /* GPIO1_63 */
#define CPLD_VERSION_MASK 0x0f
#define PWR_INT_FLAG 0x80