diff options
author | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
commit | f82642e33899766892499b163e60560fbbf87773 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/esd/du440/du440.h | |
parent | b59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff) | |
parent | 360fe71e82b83e264c964c9447c537e9a1f643c8 (diff) | |
download | u-boot-imx-f82642e33899766892499b163e60560fbbf87773.zip u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.gz u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.bz2 |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/esd/du440/du440.h')
-rw-r--r-- | board/esd/du440/du440.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/board/esd/du440/du440.h b/board/esd/du440/du440.h index 83fdac7..a124a7e 100644 --- a/board/esd/du440/du440.h +++ b/board/esd/du440/du440.h @@ -20,18 +20,18 @@ #define SDR0_USB0 0x0320 /* USB Control Register */ -#define CFG_GPIO0_EP_EEP (0x80000000 >> 23) /* GPIO0_23 */ -#define CFG_GPIO1_DCF77 (0x80000000 >> (42-32)) /* GPIO1_42 */ +#define CONFIG_SYS_GPIO0_EP_EEP (0x80000000 >> 23) /* GPIO0_23 */ +#define CONFIG_SYS_GPIO1_DCF77 (0x80000000 >> (42-32)) /* GPIO1_42 */ -#define CFG_GPIO1_IORSTN (0x80000000 >> (55-32)) /* GPIO1_55 */ -#define CFG_GPIO1_IORST2N (0x80000000 >> (47-32)) /* GPIO1_47 */ +#define CONFIG_SYS_GPIO1_IORSTN (0x80000000 >> (55-32)) /* GPIO1_55 */ +#define CONFIG_SYS_GPIO1_IORST2N (0x80000000 >> (47-32)) /* GPIO1_47 */ -#define CFG_GPIO1_HWVER_MASK 0x000000f0 /* GPIO1_56-59 */ -#define CFG_GPIO1_HWVER_SHIFT 4 -#define CFG_GPIO1_LEDUSR1 0x00000008 /* GPIO1_60 */ -#define CFG_GPIO1_LEDUSR2 0x00000004 /* GPIO1_61 */ -#define CFG_GPIO1_LEDPOST 0x00000002 /* GPIO1_62 */ -#define CFG_GPIO1_LEDDU 0x00000001 /* GPIO1_63 */ +#define CONFIG_SYS_GPIO1_HWVER_MASK 0x000000f0 /* GPIO1_56-59 */ +#define CONFIG_SYS_GPIO1_HWVER_SHIFT 4 +#define CONFIG_SYS_GPIO1_LEDUSR1 0x00000008 /* GPIO1_60 */ +#define CONFIG_SYS_GPIO1_LEDUSR2 0x00000004 /* GPIO1_61 */ +#define CONFIG_SYS_GPIO1_LEDPOST 0x00000002 /* GPIO1_62 */ +#define CONFIG_SYS_GPIO1_LEDDU 0x00000001 /* GPIO1_63 */ #define CPLD_VERSION_MASK 0x0f #define PWR_INT_FLAG 0x80 |