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| author | Stefan Roese <sr@denx.de> | 2010-02-02 13:43:48 +0100 |
|---|---|---|
| committer | Ben Warren <biggerbadderben@gmail.com> | 2010-02-06 22:52:21 -0800 |
| commit | ab5a0dcb9c8f19e351fc33c5db91469bfb1d9438 (patch) | |
| tree | 97785becfaff93d98dd9d04f94312b1a71836a44 /board/esd/cpci750 | |
| parent | 4294b2485bf0e8d68c893190a96bb0e7856b12c4 (diff) | |
| download | u-boot-imx-ab5a0dcb9c8f19e351fc33c5db91469bfb1d9438.zip u-boot-imx-ab5a0dcb9c8f19e351fc33c5db91469bfb1d9438.tar.gz u-boot-imx-ab5a0dcb9c8f19e351fc33c5db91469bfb1d9438.tar.bz2 | |
net: Use 0.5 sec timeout in miiphy_reset() instead of counting loop
This patch fixes a problem I've notived on a buggy PPC4xx system. This
system has problems with the PHY MDIO communication and seemed to be
stuck/crashed in miiphy_reset(). But degugging revealed, that the CPU
didn't crash, but "only" hung in this counting loop for about 2 minutes.
This patch now uses a real timeout of 0.5 seconds (as mentioned in the
comment in miiphy_reset).
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'board/esd/cpci750')
0 files changed, 0 insertions, 0 deletions