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author | Stefan Roese <sr@denx.de> | 2009-09-09 16:25:29 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2009-09-11 10:35:58 +0200 |
commit | d1c3b27525b664e8c4db6bb173eed51bfc8220de (patch) | |
tree | c00f3d0bcfbd5fcc1954cc9cefdbc4c9c41f41ea /board/esd/cpci405/flash.c | |
parent | e7963772eb78a6aa1fa65063d64eab3a8626daac (diff) | |
download | u-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.zip u-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.tar.gz u-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.tar.bz2 |
ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:
- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines
Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/esd/cpci405/flash.c')
-rw-r--r-- | board/esd/cpci405/flash.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/board/esd/cpci405/flash.c b/board/esd/cpci405/flash.c index d535924..4fcf174 100644 --- a/board/esd/cpci405/flash.c +++ b/board/esd/cpci405/flash.c @@ -91,13 +91,13 @@ unsigned long flash_init (void) size_b1 = 1 << 20; } base_b1 = -size_b1; - mtdcr (ebccfga, pb0cr); - pbcr = mfdcr (ebccfgd); - mtdcr (ebccfga, pb0cr); + mtdcr (EBC0_CFGADDR, PB0CR); + pbcr = mfdcr (EBC0_CFGDATA); + mtdcr (EBC0_CFGADDR, PB0CR); pbcr = (pbcr & 0x0001ffff) | base_b1 | (calc_size(size_b1) << 17); - mtdcr (ebccfgd, pbcr); + mtdcr (EBC0_CFGDATA, pbcr); #if 0 /* test-only */ - printf("size_b1=%x base_b1=%x pb1cr = %x\n", + printf("size_b1=%x base_b1=%x PB1CR = %x\n", size_b1, base_b1, pbcr); /* test-only */ #endif } @@ -108,13 +108,13 @@ unsigned long flash_init (void) size_b0 = 1 << 20; } base_b0 = base_b1 - size_b0; - mtdcr (ebccfga, pb1cr); - pbcr = mfdcr (ebccfgd); - mtdcr (ebccfga, pb1cr); + mtdcr (EBC0_CFGADDR, PB1CR); + pbcr = mfdcr (EBC0_CFGDATA); + mtdcr (EBC0_CFGADDR, PB1CR); pbcr = (pbcr & 0x0001ffff) | base_b0 | (calc_size(size_b0) << 17); - mtdcr (ebccfgd, pbcr); + mtdcr (EBC0_CFGDATA, pbcr); #if 0 /* test-only */ - printf("size_b0=%x base_b0=%x pb0cr = %x\n", + printf("size_b0=%x base_b0=%x PB0CR = %x\n", size_b0, base_b0, pbcr); /* test-only */ #endif } |