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| author | Matthias Fuchs <matthias.fuchs@esd-electronics.com> | 2009-02-20 10:19:18 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-03-20 22:39:14 +0100 |
| commit | 049216f045fd8e0f45bcef121c2bb1c7d3de6988 (patch) | |
| tree | eb0cb37228f27f5fc9737c0e8e960afa8e2993c9 /board/esd/cpci2dp/cpci2dp.c | |
| parent | a59205d1519375d027f97a545ad642ab20fce6f8 (diff) | |
| download | u-boot-imx-049216f045fd8e0f45bcef121c2bb1c7d3de6988.zip u-boot-imx-049216f045fd8e0f45bcef121c2bb1c7d3de6988.tar.gz u-boot-imx-049216f045fd8e0f45bcef121c2bb1c7d3de6988.tar.bz2 | |
ppc4xx: Use correct io accessors for esd 405 boards
This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32
macros. Also volatile pointer references are replaced by the
new accessors.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/esd/cpci2dp/cpci2dp.c')
| -rw-r--r-- | board/esd/cpci2dp/cpci2dp.c | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c index 517b174..aba240f 100644 --- a/board/esd/cpci2dp/cpci2dp.c +++ b/board/esd/cpci2dp/cpci2dp.c @@ -23,6 +23,7 @@ #include <common.h> #include <asm/processor.h> +#include <asm/io.h> #include <command.h> #include <malloc.h> @@ -36,12 +37,14 @@ int board_early_init_f (void) * Setup GPIO pins */ cntrl0Reg = mfdcr(cntrl0); - mtdcr(cntrl0, cntrl0Reg | ((CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED | CONFIG_SYS_SELF_RST | CONFIG_SYS_INTA_FAKE) << 5)); + mtdcr(cntrl0, cntrl0Reg | + ((CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED | + CONFIG_SYS_SELF_RST | CONFIG_SYS_INTA_FAKE) << 5)); /* set output pins to high */ - out32(GPIO0_OR, CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, CONFIG_SYS_EEPROM_WP); /* setup for output (LED=off) */ - out32(GPIO0_TCR, CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED); + out_be32((void *)GPIO0_TCR, CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED); /* * IRQ 0-15 405GP internally generated; active high; level sensitive @@ -124,17 +127,20 @@ int eeprom_write_enable (unsigned dev_addr, int state) { switch (state) { case 1: /* Enable write access, clear bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP); state = 0; break; case 0: /* Disable write access, set bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_EEPROM_WP); state = 0; break; default: /* Read current status back. */ - state = (0 == (in32(GPIO0_OR) & CONFIG_SYS_EEPROM_WP)); + state = (0 == (in_be32((void *)GPIO0_OR) & + CONFIG_SYS_EEPROM_WP)); break; } } |