diff options
author | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
commit | f82642e33899766892499b163e60560fbbf87773 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/esd/common | |
parent | b59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff) | |
parent | 360fe71e82b83e264c964c9447c537e9a1f643c8 (diff) | |
download | u-boot-imx-f82642e33899766892499b163e60560fbbf87773.zip u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.gz u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.bz2 |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/esd/common')
-rw-r--r-- | board/esd/common/auto_update.c | 6 | ||||
-rw-r--r-- | board/esd/common/esd405ep_nand.c | 18 | ||||
-rw-r--r-- | board/esd/common/flash.c | 136 | ||||
-rw-r--r-- | board/esd/common/fpga.c | 18 | ||||
-rw-r--r-- | board/esd/common/lcd.c | 34 | ||||
-rw-r--r-- | board/esd/common/pci.c | 22 | ||||
-rw-r--r-- | board/esd/common/xilinx_jtag/ports.h | 10 |
7 files changed, 122 insertions, 122 deletions
diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c index a1e0ce5..633f641 100644 --- a/board/esd/common/auto_update.c +++ b/board/esd/common/auto_update.c @@ -72,7 +72,7 @@ extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean); #endif -extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE]; +extern block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE]; int au_check_cksum_valid(int i, long nbytes) { @@ -335,7 +335,7 @@ static void process_macros (const char *input, char *output) char c, prev; const char *varname_start = NULL; int inputcnt = strlen (input); - int outputcnt = CFG_CBSIZE; + int outputcnt = CONFIG_SYS_CBSIZE; int state = 0; /* 0 = waiting for '$' */ /* 1 = waiting for '(' or '{' */ /* 2 = waiting for ')' or '}' */ @@ -394,7 +394,7 @@ static void process_macros (const char *input, char *output) case 2: /* Waiting for ) */ if (c == ')' || c == '}') { int i; - char envname[CFG_CBSIZE], *envval; + char envname[CONFIG_SYS_CBSIZE], *envval; /* Varname # of chars */ int envcnt = input - varname_start - 1; diff --git a/board/esd/common/esd405ep_nand.c b/board/esd/common/esd405ep_nand.c index 40d1efb..736176f 100644 --- a/board/esd/common/esd405ep_nand.c +++ b/board/esd/common/esd405ep_nand.c @@ -35,17 +35,17 @@ static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int struct nand_chip *this = mtd->priv; if (ctrl & NAND_CTRL_CHANGE) { if ( ctrl & NAND_CLE ) - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CLE); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CLE); else - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CLE); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_CLE); if ( ctrl & NAND_ALE ) - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_ALE); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_ALE); else - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_ALE); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_ALE); if ( ctrl & NAND_NCE ) - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CE); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_CE); else - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CE); } if (cmd != NAND_CMD_NONE) @@ -58,7 +58,7 @@ static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int */ static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo) { - if (in_be32((void *)GPIO0_IR) & CFG_NAND_RDY) + if (in_be32((void *)GPIO0_IR) & CONFIG_SYS_NAND_RDY) return 1; return 0; } @@ -69,8 +69,8 @@ int board_nand_init(struct nand_chip *nand) /* * Set NAND-FLASH GPIO signals to defaults */ - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE)); - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE)); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CE); /* * Initialize nand_chip structure diff --git a/board/esd/common/flash.c b/board/esd/common/flash.c index bda361e..3ea053b 100644 --- a/board/esd/common/flash.c +++ b/board/esd/common/flash.c @@ -27,7 +27,7 @@ #endif #include <asm/processor.h> -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions @@ -167,7 +167,7 @@ void flash_print_info (flash_info_t *info) printf (" Sector Start Addresses:"); for (i=0; i<info->sector_count; ++i) { -#ifdef CFG_FLASH_EMPTY_INFO +#ifdef CONFIG_SYS_FLASH_EMPTY_INFO /* * Check if whole sector is erased */ @@ -221,28 +221,28 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) { short i; short n; - CFG_FLASH_WORD_SIZE value; + CONFIG_SYS_FLASH_WORD_SIZE value; ulong base = (ulong)addr; - volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)addr; + volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)addr; /* Write auto select command: read Manufacturer ID */ - addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00900090; + addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; + addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; + addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00900090; - value = addr2[CFG_FLASH_READ0]; + value = addr2[CONFIG_SYS_FLASH_READ0]; switch (value) { - case (CFG_FLASH_WORD_SIZE)AMD_MANUFACT: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_MANUFACT: info->flash_id = FLASH_MAN_AMD; break; - case (CFG_FLASH_WORD_SIZE)FUJ_MANUFACT: + case (CONFIG_SYS_FLASH_WORD_SIZE)FUJ_MANUFACT: info->flash_id = FLASH_MAN_FUJ; break; - case (CFG_FLASH_WORD_SIZE)SST_MANUFACT: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_MANUFACT: info->flash_id = FLASH_MAN_SST; break; - case (CFG_FLASH_WORD_SIZE)EXCEL_MANUFACT: + case (CONFIG_SYS_FLASH_WORD_SIZE)EXCEL_MANUFACT: info->flash_id = FLASH_MAN_EXCEL; break; default: @@ -252,104 +252,104 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) return (0); /* no or unknown flash */ } - value = addr2[CFG_FLASH_READ1]; /* device ID */ + value = addr2[CONFIG_SYS_FLASH_READ1]; /* device ID */ switch (value) { - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400T: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV400T: info->flash_id += FLASH_AM400T; info->sector_count = 11; info->size = 0x00080000; break; /* => 0.5 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400B: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV400B: info->flash_id += FLASH_AM400B; info->sector_count = 11; info->size = 0x00080000; break; /* => 0.5 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800T: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV800T: info->flash_id += FLASH_AM800T; info->sector_count = 19; info->size = 0x00100000; break; /* => 1 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800B: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV800B: info->flash_id += FLASH_AM800B; info->sector_count = 19; info->size = 0x00100000; break; /* => 1 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160T: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV160T: info->flash_id += FLASH_AM160T; info->sector_count = 35; info->size = 0x00200000; break; /* => 2 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160B: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV160B: info->flash_id += FLASH_AM160B; info->sector_count = 35; info->size = 0x00200000; break; /* => 2 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320T: info->flash_id += FLASH_AM320T; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320B: info->flash_id += FLASH_AM320B; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322T: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL322T: info->flash_id += FLASH_AMDL322T; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322B: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL322B: info->flash_id += FLASH_AMDL322B; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323T: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL323T: info->flash_id += FLASH_AMDL323T; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323B: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL323B: info->flash_id += FLASH_AMDL323B; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ - case (CFG_FLASH_WORD_SIZE)AMD_ID_LV640U: + case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV640U: info->flash_id += FLASH_AM640U; info->sector_count = 128; info->size = 0x00800000; break; /* => 8 MB */ #if !(defined(CONFIG_ADCIOP) || defined(CONFIG_DASA_SIM)) - case (CFG_FLASH_WORD_SIZE)SST_ID_xF800A: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF800A: info->flash_id += FLASH_SST800A; info->sector_count = 16; info->size = 0x00100000; break; /* => 1 MB */ - case (CFG_FLASH_WORD_SIZE)SST_ID_xF160A: - case (CFG_FLASH_WORD_SIZE)SST_ID_xF1601: - case (CFG_FLASH_WORD_SIZE)SST_ID_xF1602: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF160A: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF1601: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF1602: info->flash_id += FLASH_SST160A; info->sector_count = 32; info->size = 0x00200000; break; /* => 2 MB */ - case (CFG_FLASH_WORD_SIZE)SST_ID_xF3201: - case (CFG_FLASH_WORD_SIZE)SST_ID_xF3202: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF3201: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF3202: info->flash_id += FLASH_SST320; info->sector_count = 64; info->size = 0x00400000; break; /* => 4 MB */ - case (CFG_FLASH_WORD_SIZE)SST_ID_xF6401: - case (CFG_FLASH_WORD_SIZE)SST_ID_xF6402: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF6401: + case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF6402: info->flash_id += FLASH_SST640; info->sector_count = 128; info->size = 0x00800000; @@ -424,19 +424,19 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) for (i = 0; i < info->sector_count; i++) { /* read sector protection at sector address, (A7 .. A0) = 0x02 */ /* D0 = 1 if protected */ - addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]); + addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]); if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_AMD) info->protect[i] = 0; else - info->protect[i] = addr2[CFG_FLASH_READ2] & 1; + info->protect[i] = addr2[CONFIG_SYS_FLASH_READ2] & 1; } /* * Prevent writes to uninitialized FLASH. */ if (info->flash_id != FLASH_UNKNOWN) { - addr2 = (CFG_FLASH_WORD_SIZE *)info->start[0]; - *addr2 = (CFG_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ + addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[0]; + *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ } return (info->size); @@ -448,8 +448,8 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { - volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *)(info->start[0]); - volatile CFG_FLASH_WORD_SIZE *addr2; + volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]); + volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2; int flag, prot, sect, l_sect; ulong start, now, last; int i; @@ -490,25 +490,25 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ - addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[sect]); + addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[sect]); if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080; - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr2[0] = (CFG_FLASH_WORD_SIZE)0x00500050; /* block erase */ + addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; + addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; + addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080; + addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; + addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; + addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00500050; /* block erase */ for (i=0; i<50; i++) udelay(1000); /* wait 1 ms */ } else { if (sect == s_first) { - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080; - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; + addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; + addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; + addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080; + addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; + addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; } - addr2[0] = (CFG_FLASH_WORD_SIZE)0x00300030; /* sector erase */ + addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00300030; /* sector erase */ } l_sect = sect; } @@ -529,9 +529,9 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) start = get_timer (0); last = start; - addr = (CFG_FLASH_WORD_SIZE *)(info->start[l_sect]); - while ((addr[0] & (CFG_FLASH_WORD_SIZE)0x00800080) != (CFG_FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[l_sect]); + while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) != (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return 1; } @@ -544,8 +544,8 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) DONE: /* reset to read mode */ - addr = (CFG_FLASH_WORD_SIZE *)info->start[0]; - addr[0] = (CFG_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ + addr = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[0]; + addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ printf (" done\n"); return 0; @@ -630,9 +630,9 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) */ static int write_word (flash_info_t *info, ulong dest, ulong data) { - volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[0]); - volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *)dest; - volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *)&data; + volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]); + volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *)dest; + volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *)&data; ulong start; int flag; int i; @@ -645,11 +645,11 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - for (i=0; i<4/sizeof(CFG_FLASH_WORD_SIZE); i++) + for (i=0; i<4/sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) { - addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00A000A0; + addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA; + addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055; + addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00A000A0; dest2[i] = data2[i]; @@ -659,9 +659,9 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) /* data polling for D7 */ start = get_timer (0); - while ((dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { return (1); } } diff --git a/board/esd/common/fpga.c b/board/esd/common/fpga.c index 9e2be7e..5232ddd 100644 --- a/board/esd/common/fpga.c +++ b/board/esd/common/fpga.c @@ -36,12 +36,12 @@ #define MAX_ONES 226 -#ifdef CFG_FPGA_PRG -# define FPGA_PRG CFG_FPGA_PRG /* FPGA program pin (ppc output) */ -# define FPGA_CLK CFG_FPGA_CLK /* FPGA clk pin (ppc output) */ -# define FPGA_DATA CFG_FPGA_DATA /* FPGA data pin (ppc output) */ -# define FPGA_DONE CFG_FPGA_DONE /* FPGA done pin (ppc input) */ -# define FPGA_INIT CFG_FPGA_INIT /* FPGA init pin (ppc input) */ +#ifdef CONFIG_SYS_FPGA_PRG +# define FPGA_PRG CONFIG_SYS_FPGA_PRG /* FPGA program pin (ppc output) */ +# define FPGA_CLK CONFIG_SYS_FPGA_CLK /* FPGA clk pin (ppc output) */ +# define FPGA_DATA CONFIG_SYS_FPGA_DATA /* FPGA data pin (ppc output) */ +# define FPGA_DONE CONFIG_SYS_FPGA_DONE /* FPGA done pin (ppc input) */ +# define FPGA_INIT CONFIG_SYS_FPGA_INIT /* FPGA init pin (ppc input) */ #else # define FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */ # define FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */ @@ -98,7 +98,7 @@ static int fpga_boot (const unsigned char *fpgadata, int size) int count; unsigned char b; -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 int j; #else int bit; @@ -112,7 +112,7 @@ static int fpga_boot (const unsigned char *fpgadata, int size) index += len + 3; } -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 /* search for preamble 0xFFFFFFFF */ while (1) { if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff) @@ -186,7 +186,7 @@ static int fpga_boot (const unsigned char *fpgadata, int size) DBG ("write configuration data into fpga\n"); /* write configuration-data into fpga... */ -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 /* * Load uncompressed image into fpga */ diff --git a/board/esd/common/lcd.c b/board/esd/common/lcd.c index c23dc81..1eea59e 100644 --- a/board/esd/common/lcd.c +++ b/board/esd/common/lcd.c @@ -37,7 +37,7 @@ int lcd_depth; unsigned char *glob_lcd_reg; unsigned char *glob_lcd_mem; -#if defined(CFG_LCD_ENDIAN) +#if defined(CONFIG_SYS_LCD_ENDIAN) void lcd_setup(int lcd, int config) { if (lcd == 0) { @@ -47,21 +47,21 @@ void lcd_setup(int lcd, int config) /* set reset to low */ out_be32((void*)GPIO0_OR, - in_be32((void*)GPIO0_OR) & ~CFG_LCD0_RST); + in_be32((void*)GPIO0_OR) & ~CONFIG_SYS_LCD0_RST); udelay(10); /* wait 10us */ if (config == 1) { /* big-endian */ out_be32((void*)GPIO0_OR, - in_be32((void*)GPIO0_OR) | CFG_LCD_ENDIAN); + in_be32((void*)GPIO0_OR) | CONFIG_SYS_LCD_ENDIAN); } else { /* little-endian */ out_be32((void*)GPIO0_OR, - in_be32((void*)GPIO0_OR) & ~CFG_LCD_ENDIAN); + in_be32((void*)GPIO0_OR) & ~CONFIG_SYS_LCD_ENDIAN); } udelay(10); /* wait 10us */ /* set reset to high */ out_be32((void*)GPIO0_OR, - in_be32((void*)GPIO0_OR) | CFG_LCD0_RST); + in_be32((void*)GPIO0_OR) | CONFIG_SYS_LCD0_RST); } else { /* * Set endianess and reset lcd controller 1 (big) @@ -69,29 +69,29 @@ void lcd_setup(int lcd, int config) /* set reset to low */ out_be32((void*)GPIO0_OR, - in_be32((void*)GPIO0_OR) & ~CFG_LCD1_RST); + in_be32((void*)GPIO0_OR) & ~CONFIG_SYS_LCD1_RST); udelay(10); /* wait 10us */ if (config == 1) { /* big-endian */ out_be32((void*)GPIO0_OR, - in_be32((void*)GPIO0_OR) | CFG_LCD_ENDIAN); + in_be32((void*)GPIO0_OR) | CONFIG_SYS_LCD_ENDIAN); } else { /* little-endian */ out_be32((void*)GPIO0_OR, - in_be32((void*)GPIO0_OR) & ~CFG_LCD_ENDIAN); + in_be32((void*)GPIO0_OR) & ~CONFIG_SYS_LCD_ENDIAN); } udelay(10); /* wait 10us */ /* set reset to high */ out_be32((void*)GPIO0_OR, - in_be32((void*)GPIO0_OR) | CFG_LCD1_RST); + in_be32((void*)GPIO0_OR) | CONFIG_SYS_LCD1_RST); } /* - * CFG_LCD_ENDIAN may also be FPGA_RESET, so set inactive + * CONFIG_SYS_LCD_ENDIAN may also be FPGA_RESET, so set inactive */ - out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_LCD_ENDIAN); + out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CONFIG_SYS_LCD_ENDIAN); } -#endif /* CFG_LCD_ENDIAN */ +#endif /* CONFIG_SYS_LCD_ENDIAN */ int lcd_bmp(uchar *logo_bmp) @@ -116,20 +116,20 @@ int lcd_bmp(uchar *logo_bmp) /* * Decompress bmp image */ - len = CFG_VIDEO_LOGO_MAX_SIZE; - dst = malloc(CFG_VIDEO_LOGO_MAX_SIZE); + len = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE; + dst = malloc(CONFIG_SYS_VIDEO_LOGO_MAX_SIZE); if (dst == NULL) { printf("Error: malloc for gunzip failed!\n"); return 1; } - if (gunzip(dst, CFG_VIDEO_LOGO_MAX_SIZE, + if (gunzip(dst, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE, (uchar *)logo_bmp, &len) != 0) { free(dst); return 1; } - if (len == CFG_VIDEO_LOGO_MAX_SIZE) { + if (len == CONFIG_SYS_VIDEO_LOGO_MAX_SIZE) { printf("Image could be truncated" - " (increase CFG_VIDEO_LOGO_MAX_SIZE)!\n"); + " (increase CONFIG_SYS_VIDEO_LOGO_MAX_SIZE)!\n"); } /* diff --git a/board/esd/common/pci.c b/board/esd/common/pci.c index f711205..dcb764c 100644 --- a/board/esd/common/pci.c +++ b/board/esd/common/pci.c @@ -119,24 +119,24 @@ static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t d /* * Configure PLX PCI9054 */ - pci_read_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, &status); + pci_read_config_word(CONFIG_SYS_PCI9054_DEV_FN, PCI_COMMAND, &status); status |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY; - pci_write_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, status); + pci_write_config_word(CONFIG_SYS_PCI9054_DEV_FN, PCI_COMMAND, status); /* Check the latency timer for values >= 0x60. */ - pci_read_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, &timer); + pci_read_config_byte(CONFIG_SYS_PCI9054_DEV_FN, PCI_LATENCY_TIMER, &timer); if (timer < 0x60) { - pci_write_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, 0x60); + pci_write_config_byte(CONFIG_SYS_PCI9054_DEV_FN, PCI_LATENCY_TIMER, 0x60); } /* Set I/O base register. */ - pci_write_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, CFG_PCI9054_IOBASE); - pci_read_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, &iobase); + pci_write_config_dword(CONFIG_SYS_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, CONFIG_SYS_PCI9054_IOBASE); + pci_read_config_dword(CONFIG_SYS_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, &iobase); - pci9054_iobase = pci_mem_to_phys(CFG_PCI9054_DEV_FN, iobase & PCI_BASE_ADDRESS_MEM_MASK); + pci9054_iobase = pci_mem_to_phys(CONFIG_SYS_PCI9054_DEV_FN, iobase & PCI_BASE_ADDRESS_MEM_MASK); if (pci9054_iobase == 0xffffffff) { @@ -149,13 +149,13 @@ static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t d static struct pci_config_table pci9054_config_table[] = { #ifndef CONFIG_PCI_PNP { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_BUS(CFG_ETH_DEV_FN), PCI_DEV(CFG_ETH_DEV_FN), PCI_FUNC(CFG_ETH_DEV_FN), - pci_cfgfunc_config_device, { CFG_ETH_IOBASE, - CFG_ETH_IOBASE, + PCI_BUS(CONFIG_SYS_ETH_DEV_FN), PCI_DEV(CONFIG_SYS_ETH_DEV_FN), PCI_FUNC(CONFIG_SYS_ETH_DEV_FN), + pci_cfgfunc_config_device, { CONFIG_SYS_ETH_IOBASE, + CONFIG_SYS_ETH_IOBASE, PCI_COMMAND_IO | PCI_COMMAND_MASTER }}, #ifdef CONFIG_DASA_SIM { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_BUS(CFG_PCI9054_DEV_FN), PCI_DEV(CFG_PCI9054_DEV_FN), PCI_FUNC(CFG_PCI9054_DEV_FN), + PCI_BUS(CONFIG_SYS_PCI9054_DEV_FN), PCI_DEV(CONFIG_SYS_PCI9054_DEV_FN), PCI_FUNC(CONFIG_SYS_PCI9054_DEV_FN), pci_dasa_sim_config_pci9054 }, #endif #endif diff --git a/board/esd/common/xilinx_jtag/ports.h b/board/esd/common/xilinx_jtag/ports.h index 0e38990..b702fdd 100644 --- a/board/esd/common/xilinx_jtag/ports.h +++ b/board/esd/common/xilinx_jtag/ports.h @@ -38,12 +38,12 @@ #define TDI (short) 2 /* - * Use CFG_FPGA_xxx defines from board include file. + * Use CONFIG_SYS_FPGA_xxx defines from board include file. */ -#define JTAG_TMS CFG_FPGA_PRG /* output */ -#define JTAG_TCK CFG_FPGA_CLK /* output */ -#define JTAG_TDI CFG_FPGA_DATA /* output */ -#define JTAG_TDO CFG_FPGA_DONE /* input */ +#define JTAG_TMS CONFIG_SYS_FPGA_PRG /* output */ +#define JTAG_TCK CONFIG_SYS_FPGA_CLK /* output */ +#define JTAG_TDI CONFIG_SYS_FPGA_DATA /* output */ +#define JTAG_TDO CONFIG_SYS_FPGA_DONE /* input */ /* set the port "p" (TCK, TMS, or TDI) to val (0 or 1) */ void setPort(short p, short val); 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