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authorstroese <stroese>2003-05-23 11:32:53 +0000
committerstroese <stroese>2003-05-23 11:32:53 +0000
commitc231d00f4ef881a1789e11afe5f3aceaa061725d (patch)
tree7d0be2e9b0fe56684599bccb0b67f8835e542714 /board/esd/canbt/canbt.c
parentd4629c8c8da8156393cebe1f38e3f1e24196efcf (diff)
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Code reworked for PPC405EP support.
Diffstat (limited to 'board/esd/canbt/canbt.c')
-rw-r--r--board/esd/canbt/canbt.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c
index bc7f0c7..708101e 100644
--- a/board/esd/canbt/canbt.c
+++ b/board/esd/canbt/canbt.c
@@ -114,9 +114,9 @@ int board_pre_init (void)
/*
* Setup port pins for normal operation
*/
- out32 (IBM405GP_GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32 (IBM405GP_GPIO0_TCR, 0x07038100); /* setup for output */
- out32 (IBM405GP_GPIO0_OR, 0x07030100); /* set output pins to high (default) */
+ out32 (GPIO0_ODR, 0x00000000); /* no open drain pins */
+ out32 (GPIO0_TCR, 0x07038100); /* setup for output */
+ out32 (GPIO0_OR, 0x07030100); /* set output pins to high (default) */
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive