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authorStefan Roese <sr@denx.de>2009-09-24 09:55:50 +0200
committerStefan Roese <sr@denx.de>2009-09-28 10:45:42 +0200
commit952e7760bfc5b0e3b142b9ce34e7fbb7d008c900 (patch)
treeabd867c1a44dbc20bbd970c36c76f0355adc6df4 /board/eric
parent984f10baac8ef6032df52f135943d6b0bc96f724 (diff)
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ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines. This patch now changes lower case UIC defines to upper case. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/eric')
-rw-r--r--board/eric/eric.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/board/eric/eric.c b/board/eric/eric.c
index bc2a907..cfcfa52 100644
--- a/board/eric/eric.c
+++ b/board/eric/eric.c
@@ -62,13 +62,13 @@ int board_early_init_f (void)
|
+-------------------------------------------------------------------------*/
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all SMI to be non-critical */
- mtdcr (uicpr, 0xFFFFFF88); /* set int polarities; IRQ3 to 1 */
- mtdcr (uictr, 0x10000000); /* set int trigger levels, UART0 is EDGE */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (UIC0ER, 0x00000000); /* disable all ints */
+ mtdcr (UIC0CR, 0x00000000); /* set all SMI to be non-critical */
+ mtdcr (UIC0PR, 0xFFFFFF88); /* set int polarities; IRQ3 to 1 */
+ mtdcr (UIC0TR, 0x10000000); /* set int trigger levels, UART0 is EDGE */
+ mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
+ mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
mtdcr (CPC0_CR0, 0x00002000); /* set IRQ6 as GPIO23 to generate an interrupt request to the PCP2PCI bridge */