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author | Kumar Gala <galak@kernel.crashing.org> | 2009-09-17 01:44:39 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2009-09-24 12:05:28 -0500 |
commit | 39a7e7fd538cdf49e7e8a2f0634ea5e15e12b4ec (patch) | |
tree | 1e3500019d9f6b6e490061b230326a5d6ffe4f13 /board/ep8260 | |
parent | a880cf3e0e1c220d780eccd0b101170c4499485d (diff) | |
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ppc/p4080: CoreNet platfrom style secondary core release
The CoreNet platform style of bringing secondary cores out of reset is
a bit different that the PQ3 style. Mostly the registers that we use
to setup boot translation, enable time bases, and boot release the cores
have moved around.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/ep8260')
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