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authorStefan Roese <sr@denx.de>2008-01-30 15:35:50 +0100
committerStefan Roese <sr@denx.de>2008-02-04 11:47:40 +0100
commite1d1429b49b0ee58c80f8c7b29c1ebaf8be7f5f1 (patch)
treeec68ac6e1f31bedb30d63d7a124cdf788eee89d4 /board/ep8248
parent28d77d968bfe0316deb5bf15c17f57d5ff2c8821 (diff)
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ppc4xx: Fix GPIO configuration for pcs440ep
The SRD0_PFC0 register was not configured correctly to enable the GPIO's 49-63 for GPIO. They have been configured as trace signals. This patch fixes this by clearing the corresponding bit. Signed-off-by: Stefan Roese <sr@denx.de>
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