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| author | Paul Burton <paul.burton@imgtec.com> | 2014-04-07 16:41:48 +0100 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-04-18 10:42:30 -0400 |
| commit | 6fb49e4aa08e5d4f4081840b0b30160e98becf27 (patch) | |
| tree | f67077f0f8ddc5c91eb5567feecabeeca4bb8bec /board/enbw | |
| parent | a354ddc3d7412c6d7cc702de60be32e580ccf348 (diff) | |
| download | u-boot-imx-6fb49e4aa08e5d4f4081840b0b30160e98becf27.zip u-boot-imx-6fb49e4aa08e5d4f4081840b0b30160e98becf27.tar.gz u-boot-imx-6fb49e4aa08e5d4f4081840b0b30160e98becf27.tar.bz2 | |
pcnet: force ordering of descriptor accesses
The ordering of accesses to the rx & tx descriptors is important, yet
the send & recv functions accessed them via regular structure accesses.
This leaves the compiler with the opportunity to reorder those accesses
or to hoist them outside of loops. Prevent that from happening by using
readl & writel to access the descriptors. As a nice bonus, this removes
the need for the driver to care about endianness.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'board/enbw')
0 files changed, 0 insertions, 0 deletions