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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/eltec/mhpc | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/eltec/mhpc')
-rw-r--r-- | board/eltec/mhpc/flash.c | 28 | ||||
-rw-r--r-- | board/eltec/mhpc/mhpc.c | 24 |
2 files changed, 26 insertions, 26 deletions
diff --git a/board/eltec/mhpc/flash.c b/board/eltec/mhpc/flash.c index 4cc66a9..2fbdb27 100644 --- a/board/eltec/mhpc/flash.c +++ b/board/eltec/mhpc/flash.c @@ -25,7 +25,7 @@ #include <mpc8xx.h> #include <linux/byteorder/swab.h> -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Protection Flags: @@ -62,13 +62,13 @@ static void flash_get_offsets (ulong base, flash_info_t *info); unsigned long flash_init (void) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; unsigned long size_b0; int i; /* Init: no FLASHes known */ - for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { + for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; } @@ -81,18 +81,18 @@ unsigned long flash_init (void) } /* Remap FLASH according to real size */ - memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); - memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V; + memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); + memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V; /* Re-do sizing to get full correct info */ - size_b0 = flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]); + size_b0 = flash_get_size((FPW *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); - flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); + flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); /* monitor protection ON by default */ (void)flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE+monitor_flash_len-1, + CONFIG_SYS_FLASH_BASE, + CONFIG_SYS_FLASH_BASE+monitor_flash_len-1, &flash_info[0]); flash_info[0].size = size_b0; @@ -203,10 +203,10 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) break; } - if (info->sector_count > CFG_MAX_FLASH_SECT) { + if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CFG_MAX_FLASH_SECT); - info->sector_count = CFG_MAX_FLASH_SECT; + info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); + info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; } addr[0] = (FPW)0xFF00FF00; /* restore read mode */ @@ -277,7 +277,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) udelay (1000); while (((status = SWAP(*addr)) & (FPW)0x00800080) != (FPW)0x00800080) { - if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW)0xB000B000; /* suspend erase */ *addr = (FPW)0xFF00FF00; /* reset to read mode */ @@ -419,7 +419,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) start = get_timer (0); while (((status = SWAP(*addr)) & (FPW)0x00800080) != (FPW)0x00800080) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW)0xFF00FF00; /* restore read mode */ return (1); } diff --git a/board/eltec/mhpc/mhpc.c b/board/eltec/mhpc/mhpc.c index 3666791..7cca6b2 100644 --- a/board/eltec/mhpc/mhpc.c +++ b/board/eltec/mhpc/mhpc.c @@ -36,7 +36,7 @@ #include <video_fb.h> /* imports from common/main.c */ -extern char console_buffer[CFG_CBSIZE]; +extern char console_buffer[CONFIG_SYS_CBSIZE]; extern void eeprom_init (void); extern int eeprom_read (unsigned dev_addr, unsigned offset, @@ -105,7 +105,7 @@ static const unsigned int sdram_table[] = { int board_early_init_f (void) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); volatile iop8xx_t *ip = (iop8xx_t *) & (im->im_ioport); @@ -160,7 +160,7 @@ int misc_init_r (void) int i; /* check revision data */ - eeprom_read (CFG_I2C_EEPROM_ADDR, 480, (uchar *) &mhpcRevInfo, 32); + eeprom_read (CONFIG_SYS_I2C_EEPROM_ADDR, 480, (uchar *) &mhpcRevInfo, 32); if (strncmp ((char *) &mhpcRevInfo.board[2], "MHPC", 4) != 0) { printf ("Enter revision number (0-9): %c ", @@ -228,7 +228,7 @@ int misc_init_r (void) } /* setup new revision data */ - eeprom_write (CFG_I2C_EEPROM_ADDR, 480, (uchar *) &mhpcRevInfo, + eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, 480, (uchar *) &mhpcRevInfo, 32); } @@ -253,13 +253,13 @@ int misc_init_r (void) phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; upmconfig (UPMA, (uint *) sdram_table, sizeof (sdram_table) / sizeof (uint)); - memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */ + memctl->memc_mamr = CONFIG_SYS_MAMR & (~(MAMR_PTAE)); /* no refresh yet */ memctl->memc_mbmr = MBMR_GPL_B4DIS; /* should this be mamr? - NTL */ memctl->memc_mptpr = MPTPR_PTP_DIV64; memctl->memc_mar = 0x00008800; @@ -267,15 +267,15 @@ phys_size_t initdram (int board_type) /* * Map controller SDRAM bank 0 */ - memctl->memc_or1 = CFG_OR1_PRELIM; - memctl->memc_br1 = CFG_BR1_PRELIM; + memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; + memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; udelay (200); /* * Map controller SDRAM bank 1 */ - memctl->memc_or2 = CFG_OR2; - memctl->memc_br2 = CFG_BR2; + memctl->memc_or2 = CONFIG_SYS_OR2; + memctl->memc_br2 = CONFIG_SYS_BR2; /* * Perform SDRAM initializsation sequence @@ -419,7 +419,7 @@ void *video_hw_init (void) { unsigned int clut = 0; unsigned char *penv; - immap_t *immr = (immap_t *) CFG_IMMR; + immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; /* enable video only on CLUT value */ if ((penv = (uchar *)getenv ("clut")) != NULL) @@ -470,7 +470,7 @@ void video_set_lut (unsigned int index, unsigned char r, unsigned char g, unsigned char b) { unsigned int lum; - unsigned short *pLut = (unsigned short *) (CFG_IMMR + 0x0e00); + unsigned short *pLut = (unsigned short *) (CONFIG_SYS_IMMR + 0x0e00); /* 16 bit lut values, 12 bit used, xxxx BBGG RRii iiii */ /* y = 0.299*R + 0.587*G + 0.114*B */ |