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authorWenyou Yang <wenyou.yang@atmel.com>2016-02-03 10:16:50 +0800
committerAndreas Bießmann <andreas.devel@googlemail.com>2016-02-18 21:34:40 +0100
commit70341e2ed9a0ff98a777febb7b56dbcee4d885c4 (patch)
tree791c3679b750e1d5a0e76a6f3c76453250bb073c /board/egnite
parenteced5a7eb4750e16dd571a9bd4980c68d2276f11 (diff)
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board: atmel: clean up peripheral clock code
Due to introducing the new peripheral clock handle functions, use these functions to reduce duplicated code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> [Rebased on current master, fixup for at91rm9200ek] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'board/egnite')
-rw-r--r--board/egnite/ethernut5/ethernut5.c20
1 files changed, 8 insertions, 12 deletions
diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c
index 67d3984..2c8e978 100644
--- a/board/egnite/ethernut5/ethernut5.c
+++ b/board/egnite/ethernut5/ethernut5.c
@@ -67,8 +67,8 @@
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_spi.h>
+#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/io.h>
#include <asm/gpio.h>
@@ -151,12 +151,10 @@ static void ethernut5_nand_hw_init(void)
*/
int board_init(void)
{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ at91_periph_clk_enable(ATMEL_ID_PIOA);
+ at91_periph_clk_enable(ATMEL_ID_PIOB);
+ at91_periph_clk_enable(ATMEL_ID_PIOC);
- /* Enable clocks for all PIOs */
- writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
- (1 << ATMEL_ID_PIOC),
- &pmc->pcer);
/* Set adress of boot parameters. */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
/* Initialize UARTs and power management. */
@@ -179,10 +177,9 @@ int board_eth_init(bd_t *bis)
{
const char *devname;
unsigned short mode;
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- /* Enable on-chip EMAC clock. */
- writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+ at91_periph_clk_enable(ATMEL_ID_EMAC0);
+
/* Need to reset PHY via power management. */
ethernut5_phy_reset();
/* Set peripheral pins. */
@@ -211,10 +208,8 @@ int board_eth_init(bd_t *bis)
#ifdef CONFIG_GENERIC_ATMEL_MCI
int board_mmc_init(bd_t *bd)
{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ at91_periph_clk_enable(ATMEL_ID_MCI);
- /* Enable MCI clock. */
- writel(1 << ATMEL_ID_MCI, &pmc->pcer);
/* Initialize MCI hardware. */
at91_mci_hw_init();
/* Register the device. */
@@ -229,6 +224,7 @@ int board_mmc_getcd(struct mmc *mmc)
#ifdef CONFIG_ATMEL_SPI
/*
+
* Note, that u-boot uses different code for SPI bus access. While
* memory routines use automatic chip select control, the serial
* flash support requires 'manual' GPIO control. Thus, we switch